Hi, It's been a long time since I first contacted here, but I submitted my pull request about handling Arm64 SVE architecture yesterday. https://github.com/numpy/numpy/pull/22265
Since there may be no public CI environment that runs the SVE instruction set, I tested my source code on an inhouse server (Fujitsu FX700 with A64FX). - A64FX is one of the Armv8.2-a + SVE compliant CPUs. I think the regression test was successfully completed. - python3 runtests.py --cpu-baseline=sve --cpu-dispatch=none The result shows "21354 passed, 203 skipped, 1302 deselected, 30 xfailed, 7 xpassed". My implementation is similar to those of AVX/AVX2/ASIMD. - SVE intrinsics are defined in numpy/core/src/common/simd/sve/*.h files. Travis CI reported errors https://github.com/numpy/numpy/pull/22265/checks?check_run_id=8384699529 , but it seems that the job exceeded the maximum log length, and has been terminated. I would appreciate your review of my pull request, as well as your comments and advice on this mailing list. Thanks, Kentaro _______________________________________________ NumPy-Discussion mailing list -- numpy-discussion@python.org To unsubscribe send an email to numpy-discussion-le...@python.org https://mail.python.org/mailman3/lists/numpy-discussion.python.org/ Member address: arch...@mail-archive.com
