OpenBSD src changes summary for 2016-04-23
==========================================

share/man                               sys/arch/amd64/stand/efi
sys/arch/mips64/mips64                  sys/dev/acpi
sys/dev/i2c                             sys/dev/pci
sys/dev/sdmmc                           

== share ============================================================= 01/02 ==

  http://cvsweb.openbsd.org/cgi-bin/cvsweb/src/share

man

  ~ man4/vlan.4                           

  > update this to reflect the current state of the driver.
  > while here remove a lot of cruft, namely stuff about how packets
  > are laid out.
  > i dislike documenting the ioctls instead of what to do with ifconfig.
  > most people arent programming against devices, they just want to
  > configure the things using the existing tools. oh well.
  > an examples section would be welcome if someone can tell me what's
  > useful.
  > ok sthen@ jmc@ (dlg@)

  ~ man4/vlan.4                           

  > remove errant Pp; (jmc@)

== sys =============================================================== 02/02 ==

  http://cvsweb.openbsd.org/cgi-bin/cvsweb/src/sys

arch/amd64/stand/efi

  ~ include/i386/efibind.h                

  > Seems that the 32-bit Windows ABI does align 64-bit structure members on
  > a 64-bit boundary (in constrast to the System V i386 ABI).  Use an
  > alignment
  > attribute to force 64-bit alignment of the INT64 and UINT64 types.  This
  > makes the definitions of the EFI data structures match the expectations of
  > the firmware.
  > Fixes the issue where the 32-bit UEFI bootloader (BOOTIA32.EFI) would not
  > detect a GPT leading to a failure to boot.
  > Cluestick from John Troy.
  > ok krw@, yasuoka@ (kettenis@)

arch/mips64/mips64

  ~ pmap.c                                

  > Sync dcaches and invalidate icaches of all active CPUs of a pmap when
  > making a page executable. This prevents some icache inconsistencies that
  > could arise when a process modifies its code pages and begins executing
  > them while switching between CPUs. These inconsistencies caused process
  > crashes on multiprocessor IP27/IP30 systems under load.
  > Crashes reported by deraadt@
  > Feedback from Miod, thanks! (visa@)

dev/acpi

  ~ dwiic.c                               

  > Print a meaningful interrupt string for i2c devices. (kettenis@)

  ~ dwiic.c                               

  > Match on Cherry Trail. (kettenis@)

dev/i2c

  ~ i2cvar.h                              ~ ihidev.c

  > Print a meaningful interrupt string for i2c devices. (kettenis@)

dev/pci

  ~ pcidevs                               

  > Add some missing Braswell/Cherry Trail entries and fix a typo. (kettenis@)

  ~ pcidevs.h                             ~ pcidevs_data.h

  > regen (kettenis@)

dev/sdmmc

  ~ sdmmc_cis.c                           ~ sdmmc_io.c
  ~ sdmmc_ioreg.h                         

  > Implement reading of the CIS for functions 1-7.  Don't write a bogus bus
  > width
  > value when initializing function 0, and correct a few related #defines.
  > ok deraadt@ (kettenis@)

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