OpenBSD src changes summary for 2016-08-08 ==========================================
lib/csu libexec/ld.so sys/arch/arm/arm sys/arch/arm/armv7 sys/arch/arm/include sys/arch/armish/armish sys/arch/armv7/armv7 sys/arch/armv7/imx sys/arch/zaurus/zaurus sys/dev/pv sys/netinet6 sys/uvm usr.bin/openssl usr.bin/ssh usr.bin/vi usr.sbin/bgpd usr.sbin/eigrpd usr.sbin/ldpd usr.sbin/switchd == lib =============================================================== 01/05 == http://cvsweb.openbsd.org/cgi-bin/cvsweb/src/lib csu ~ boot.h > Look for a PT_GNU_RELRO section and, if present, mprotect that range > instead of the [__got_start, __got_end) range. > Also, instead of mprotecting the [__plt_start, __plt_end) range, > just scan for sections which are both writable and executable and > mprotect them to read-only. (This part was stolen from kettenis@) > ok kettenis@ (guenther@) == libexec =========================================================== 02/05 == http://cvsweb.openbsd.org/cgi-bin/cvsweb/src/libexec ld.so ~ library.c ~ library_mquery.c ~ loader.c ~ resolve.c ~ resolve.h > Look for a PT_GNU_RELRO section per object and, if present, mprotect that > range instead of the [__got_start, __got_end) range. > On many archs this will cover _DYNAMIC too, so move up the DT_DEBUG > handling > to before relocations and the mprotect are done. > ok kettenis@ (guenther@) == sys =============================================================== 03/05 == http://cvsweb.openbsd.org/cgi-bin/cvsweb/src/sys arch/arm/arm ~ pmap7.c > ARMv7 data caches are "effectively" PIPT. This means there is in general > no need to clean and/or invalidate cached pages. So remove most of the > cache cleaning and invalidation from the pmap. We still need to > synchronize > the instruction cache with the data cache in various places though. And we > also need to make sure that we clean and invalidate when we make a page > non-cachable. > Tested by Daniel Bolgheroni, mglocker@ and jsg@. on Cortex-A8 and myself on > Cortex-A9. > ok visa@ (kettenis@) ~ pmap7.c > Mapping non-cachable memory as cachable and subsequently changing the > mapping > to non-cachable is retarded. Fix this by introducing PMAP_NOCACHE and > PMAP_DEVICE flags that can be or'ed into the physical address passed to > pmap_kenter(9), like we have on many of our other architectures. This way > we > can also properly distinguish between device memory and normal > (non-cachable) > memory. > ok visa@ (kettenis@) ~ arm32_machdep.c > Move the cpu_setup() call to the end of initarm(). On Cortex-A53 > processors > atomic instructions don't work unless the data cache is enabled. This > happens > in cpu_setup(), but that gets currently called from cpu_startup() which > runs > after a number of kernel subsystems have been initialized. Since some of > these subsystems use locks, which need atomic instructions, we fault on > Cortex-A53. Since at the end of initarm() we're done setting up the pmap > and initializing other low-level sense, calling cpu_setup() here makes much > more sense. > Remove setting up proc0paddr as well from cpu_startup(), since that already > happens in initarm(). > Tested on zaurus by deraadt@. > ok jsg@, patrick@ (kettenis@) arch/arm/armv7 ~ armv7_space.c > Mapping non-cachable memory as cachable and subsequently changing the > mapping > to non-cachable is retarded. Fix this by introducing PMAP_NOCACHE and > PMAP_DEVICE flags that can be or'ed into the physical address passed to > pmap_kenter(9), like we have on many of our other architectures. This way > we > can also properly distinguish between device memory and normal > (non-cachable) > memory. > ok visa@ (kettenis@) arch/arm/include ~ pmap.h > Mapping non-cachable memory as cachable and subsequently changing the > mapping > to non-cachable is retarded. Fix this by introducing PMAP_NOCACHE and > PMAP_DEVICE flags that can be or'ed into the physical address passed to > pmap_kenter(9), like we have on many of our other architectures. This way > we > can also properly distinguish between device memory and normal > (non-cachable) > memory. > ok visa@ (kettenis@) arch/armish/armish ~ armish_machdep.c > Move the cpu_setup() call to the end of initarm(). On Cortex-A53 > processors > atomic instructions don't work unless the data cache is enabled. This > happens > in cpu_setup(), but that gets currently called from cpu_startup() which > runs > after a number of kernel subsystems have been initialized. Since some of > these subsystems use locks, which need atomic instructions, we fault on > Cortex-A53. Since at the end of initarm() we're done setting up the pmap > and initializing other low-level sense, calling cpu_setup() here makes much > more sense. > Remove setting up proc0paddr as well from cpu_startup(), since that already > happens in initarm(). > Tested on zaurus by deraadt@. > ok jsg@, patrick@ (kettenis@) arch/armv7/armv7 ~ armv7_machdep.c > Move the cpu_setup() call to the end of initarm(). On Cortex-A53 > processors > atomic instructions don't work unless the data cache is enabled. This > happens > in cpu_setup(), but that gets currently called from cpu_startup() which > runs > after a number of kernel subsystems have been initialized. Since some of > these subsystems use locks, which need atomic instructions, we fault on > Cortex-A53. Since at the end of initarm() we're done setting up the pmap > and initializing other low-level sense, calling cpu_setup() here makes much > more sense. > Remove setting up proc0paddr as well from cpu_startup(), since that already > happens in initarm(). > Tested on zaurus by deraadt@. > ok jsg@, patrick@ (kettenis@) arch/armv7/imx ~ imxesdhc.c > Implement mmc power sequencing; makes the sdo interface on the cubox-i work > and see the BCM4330 wireless (for which we don't have a driver yet). > ok jsg@ (kettenis@) arch/zaurus/zaurus ~ zaurus_machdep.c > Move the cpu_setup() call to the end of initarm(). On Cortex-A53 > processors > atomic instructions don't work unless the data cache is enabled. This > happens > in cpu_setup(), but that gets currently called from cpu_startup() which > runs > after a number of kernel subsystems have been initialized. Since some of > these subsystems use locks, which need atomic instructions, we fault on > Cortex-A53. Since at the end of initarm() we're done setting up the pmap > and initializing other low-level sense, calling cpu_setup() here makes much > more sense. > Remove setting up proc0paddr as well from cpu_startup(), since that already > happens in initarm(). > Tested on zaurus by deraadt@. > ok jsg@, patrick@ (kettenis@) dev/pv ~ hyperv.c > Fixup incorrect format specification bugs spotted by jsg@ (mikeb@) netinet6 ~ in6.c > Execute address hooks in the update case. > This matches what IPv4 is doing and unbreak carp(4) when the same > address is set twice, for example when running netstart(8) multiple > times. > Issue reported by and fix from Simon Mages. (mpi@) uvm ~ uvm_mmap.c > W^X violations are only permitted for binaries marked "wxneeded" on > "wxallowed" filesystems. mmap(2) & mprotect(2) now return ENOTSUP. > (To diagnose buggy programs, consider using sysctl kern.wxabort=1 and > looking at the coredumps) > ok kettenis tedu naddy (deraadt@) == usr.bin =========================================================== 04/05 == http://cvsweb.openbsd.org/cgi-bin/cvsweb/src/usr.bin openssl ~ openssl.1 > trim the dsaparam section; ok guenther (jmc@) ssh ~ mux.c > Improve error message for overlong ControlPath. ok markus@ djm@ (dtucker@) vi ~ build/recover ~ docs/help ~ docs/USD.doc/vi.man/vi.1 ~ docs/USD.doc/vi.ref/set.opt.roff ~ docs/USD.doc/vi.ref/vi.ref > /tmp and /var/tmp are the same, consistently use the former in both > build/recover and documentation. > ok millert@, tb@, martijn@ and schwarze@ (sobrado@) == usr.sbin ========================================================== 05/05 == http://cvsweb.openbsd.org/cgi-bin/cvsweb/src/usr.sbin bgpd ~ log.c ~ rde.c ~ session.c > Use exit(3) instead of _exit(2) in the child processes. > Since recently the child processes call exec() after fork(), so they > should stop using _exit(2) and use exit(3) instead when shutting down. > Ok claudio@ (renato@) eigrpd ~ eigrpe.c ~ log.c ~ rde.c > rde and eigrpe should use exit(3) instead of _exit(2) > Since recently these processes call exec() after fork(), so they should > stop using _exit(2) and use exit(3) instead when shutting down. > ok claudio@ (renato@) ~ eigrpd.c ~ eigrpd.h > Simplify shutdown process > On shutdown, there's no need to use kill(2) to kill the child > processes. Just closing the IPC sockets will make the children receive > an EOF, break out from the event loop and then exit. > This "pipe teardown" removes a PID reuse race condition, makes the code > simpler and allow us to remove "proc" from pledge. > OK and tweaks from claudio@ (renato@) ldpd ~ labelmapping.c ~ lde.c ~ log.c > Normalize the received prefixes. > We need to use ldp_applymask() to normalize the received > prefixes. Example: 10.1.1.0/16 -> 10.1.0.0/16. > Additionally, stop using IANA's AF numbers in map->fec.prefix.af and use > AF_INET/AF_INET6 instead. This makes the code much simpler, use AF_IPV[46] > only when necessary (decoding/encoding prefixes). > ok claudio@ (renato@) ~ lde.c ~ ldpe.c ~ log.c > Use exit(3) instead of _exit(2) in the child processes. > Since recently the child processes call exec() after fork(), so they should > stop using _exit(2) and use exit(3) instead when shutting down. > Ok claudio@ (renato@) switchd ~ ofcconn.c > Split ofcconn into switch part and connection part to make the switch > part be able to have multiple connections. > ok reyk. (yasuoka@) ~ ofcconn.c > Fix previous. Obvously the condition is reversed. (yasuoka@) ~ control.c > Handle imsg_read() EAGAIN like the man page code example. > ok reyk@ (rzalamena@) ~ switchd.c > Create socket with SOCK_NONBLOCK instead of using fcntl() without the > proper flag handling. > ok reyk@ (rzalamena@) =============================================================================== _______________________________________________ odc mailing list [email protected] http://www.squish.net/mailman/listinfo/odc
