Hi Chet - no problem.  The discussion on these topics was quite short.  For 
convenience, I am attaching the minutes from this morning's meeting - see the 
section toward the bottom labelled: "Resuming on 8/2/16" (I've been keeping 
this part of the minutes as a running commentary spanning the meetings where 
this has been discussed in order to keep the whole discussion in one place.)

See the note in there about taking your proposal to the larger OFI WG group for 
its review - you and I should work on scheduling that activity.  It is possible 
to schedule that for as early as next week if you are ready to do so.

Comments are, as always, welcome.

-Paul

From: Douglas, Chet R [mailto:[email protected]]
Sent: Tuesday, August 02, 2016 8:41 AM
To: Paul Grun <[email protected]>; '[email protected]' 
<[email protected]>
Subject: RE: DS/DA - Agenda for 8/2/16

I apologize that I was not able to attend today to close on these topics.  I 
have been pulled in to another meeting at this time.

Perhaps we can discuss in two weeks?

From: ofiwg [mailto:[email protected]] On Behalf Of Paul Grun
Sent: Tuesday, August 02, 2016 12:49 AM
To: '[email protected]' 
<[email protected]<mailto:[email protected]>>
Subject: [ofiwg] DS/DA - Agenda for 8/2/16


1.      Complete discussion of Intel's proposed OFA API extensions for RDMA

a.      'barrier' vs 'fence' - impacts on subsequent write operations?

b.      Ordering questions w.r.t. an explicit commit list.  Required ordering 
semantics?  Intel proposal requires commit and fence flags via separate write 
requests when writing to the same memory region (same R_KEY).  IETF draft, by 
comparison, uses an explicit commit list.

c.      Hopefully, Cray and NetApp will be available to discuss preferred 
approaches.

Advanced Technology Group
Cray, Inc.
Office  - (503) 620 - 8757
Mobile - (503) 703 - 5382

Attachment: OFWG_DSDA_minutes_2016-08-02.docx
Description: OFWG_DSDA_minutes_2016-08-02.docx

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