<tab> == 4-spaces
Unfortunately email tends to not preserve tab-stop settings on RFC
patches.

________________________________

From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On Behalf Of Sean Hefty
Sent: Wednesday, April 02, 2008 10:20 AM
To: 'Slava Strebkov'; [email protected]
Subject: RE: [ofw] [PATCH] affinity options



Can you provide any data that shows the benefit of this?  (I don't
really care what app, but maybe showing the improvement that IPoIB
gets?)

 

________________________________

From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On Behalf Of Slava Strebkov
Sent: Wednesday, April 02, 2008 7:47 AM
To: [email protected]
Subject: [ofw] [PATCH] affinity options

 

Hi,

The following patch provides a way to user to specify the cpu affinity
mask.

Setting the value of ProcessorAffinity to FFFFFFFF binds interrupt to
last cpu on machine.

 

Why do we need this special value, versus just some CPU index value?  In
place of FFFFFFFF, just use 0 to get the first. 

 

Index: hw/mthca/kernel/hca_pnp.c

===================================================================

--- hw/mthca/kernel/hca_pnp.c   (revision 1031)

+++ hw/mthca/kernel/hca_pnp.c (working copy)

@@ -678,6 +678,29 @@

                        if( pHcaRes->Type == CmResourceTypeInterrupt )

                        {

                                    p_ext->interruptInfo = *pHostRes;

+            if ( g_processor_affinity == 0xFFFFFFFF ) 

+                                  {

+                                              /* 

+                                              * Calculate the mask of
the last processor

+                                              */

+                                              KAFFINITY
n_active_processors_bitmask;

+                                              uint32_t
last_processor_mask = 0 , tmp_processor_mask = 1;

+                                              

+
n_active_processors_bitmask = KeQueryActiveProcessors();

+                while ( tmp_processor_mask &
n_active_processors_bitmask )

+                                              {

+
last_processor_mask = tmp_processor_mask;

+
tmp_processor_mask = tmp_processor_mask << 1;

+                                              }

+
p_ext->interruptInfo.u.Interrupt.Affinity = last_processor_mask; 

+                                  }

+                                  else if (g_processor_affinity != 0) 

+                                  {

+
p_ext->interruptInfo.u.Interrupt.Affinity = g_processor_affinity;


+                                  }

+                                  HCA_PRINT( TRACE_LEVEL_INFORMATION,
HCA_DBG_PNP,("Set Interrupt affinity to : 0x%08X\n",

+
(int)p_ext->interruptInfo.u.Interrupt.Affinity ));

+

 

This is separate from this patch, but can we agree on a common
definition for what a 'tab' is in this stack?

 

- Sean

 

 

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