Author: kk208521 Repository: /hg/onnv/onnv-gate Latest revision: 395a95dbfd17b94c79dc0469dc6dd021f6747077 Total changesets: 1 Log message: 6526262 cpuid ssse3 feature not noted on Intel Woodcrest/Conroe processors 6563039 Need support for Intel's SSE4.1 and SSE4.2 instructions
Files:
update: usr/src/common/dis/i386/dis_tables.c
update: usr/src/common/elfcap/elfcap.c
update: usr/src/uts/common/sys/auxv_386.h
update: usr/src/uts/i86pc/os/cpuid.c
update: usr/src/uts/intel/sys/x86_archext.h
