Author: jveta
Repository: /hg/onnv/onnv-gate
Latest revision: f98e16d231504bb23b671424d053ceacaa5c4d12
Total changesets: 1
Log message:
6678841 Uncorrectable PCIE Errors are ignored on Intel based platforms
6682428 MAM should not be enabled on bridges when URs are masked
6683663 SERR should always be enabled in the bridge control register
Files:
update: usr/src/uts/common/io/pcie.c
update: usr/src/uts/i86pc/io/intel_nb5000/nb5000.h
update: usr/src/uts/i86pc/io/intel_nb5000/nb5000_init.c
update: usr/src/uts/intel/io/pciex/pcie_pci.c
