On Thursday 10 February 2005 03:21, Lourens Veen wrote:
> > Saving a clock here doesn't improve performance because it's
> > pipelined anyway.  A single, dual-ported 18 Kbit table can do the
> > job in a total of two clocks for two pixels.  Not only is it
> > perfectly efficient, it's also about as simple as you can get.
>
> No it doesn't... if we want to spit out two pixels each clock we
> need four reads per clock. No amount of pipelining can change that.

Whoops, you're right and I apologize.  OK, ram blocks being more 
plentiful than multipliers, using two seems like a good idea.

Regards,

Daniel
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