Yes, we looked at it. It's very sophisticated. But the wishbone
(Binterface is totally unsuited to inter-chip communication, and we need
(Bour own design that we can add PCI-X and AGP to.
(B
(BOn 5/1/05, Attila Kinali <[EMAIL PROTECTED]> wrote:
(B> On Thu, 28 Apr 2005 16:18:52 -0400
(B> Timothy Miller <[EMAIL PROTECTED]> wrote:
(B>
(B> > - A Lattice XP6 flash-based FPGA for the host interface
(B>
(B> About the code for the PCI interface, did you have a look
(B> at the PCI interface on opencores ?
(B> ( http://www.opencores.org/projects.cgi/web/pci/home )
(B>
(B> It's a, as it looks for me as a layman, like a complete
(B> PCI implementation. It also provides a "standard" interface
(B> for other IP modules. It's written in verilog and it's LGPL.
(B> So, this would give a very good starting point, even if the
(B> wishbone interface wouldn't be used by use, the host part
(B> could be reused.
(B>
(B> Attila Kinali
(B> --
(B> $B6?$KF~$l$P6?$K=>$((B
(B> _______________________________________________
(B> Open-graphics mailing list
(B> [email protected]
(B> http://lists.duskglow.com/mailman/listinfo/open-graphics
(B> List service provided by Duskglow Consulting, LLC (www.duskglow.com)
(B>
(B_______________________________________________
(BOpen-graphics mailing list
([email protected]
(Bhttp://lists.duskglow.com/mailman/listinfo/open-graphics
(BList service provided by Duskglow Consulting, LLC (www.duskglow.com)
