Hi Timothy,
On Sun, 2005-05-01 at 21:38 -0400, Timothy Miller wrote:
> As far as I am concerned, a stack machine is a great idea.  

Great. :-)

> I've dabbled here and there with CPU designs.  Some of the most
> "efficient" I've come up with were stack machines.  What's nice about
> them is that since the operands are implicit, you don't have to pack
> them into the instruction word.  Instead of a 32-bit instruction, you
> can have an 8-bit instruction, and that means you can execute 4 times
> as many instructions for your memory/cache bandwidth.  What always got
> in my way with the stack machines had to do with things like context
> switches and supervisor-mode stuff that required seeing the CPU in a
> less stack-oriented way.  In THIS case, however, we won't have context
> switches to worry about or any of that.

Heh. Well, it just so happens I have a Forth VM design on the
backburner... The C emulator is about 80% done, and so is the assembler.
It's a fair bit more powerful than what we would need, so I would have
to trim both back to get something we can use.

> Ok, what's the instruction set now?  :)

Well, this may be a bit overkill, but here are the opcodes I have so far
for the VM I was working on (which I called Falcon, for no good reason):

+---------+---------------+--------------+---------------------------------------------+
| Opcode  | Stack Before  | Stack After  |                 Description          
       |
+---------+---------------+--------------+---------------------------------------------+
+---------+---------------+--------------+---------------------------------------------+
|  NOP    |      -        |      -       |                 Do nothing           
       |
+---------+---------------+--------------+---------------------------------------------+
|   !     |     x a       |      -       |            Store x at address a      
       |
+---------+---------------+--------------+---------------------------------------------+
|   @     |      a        |      x       | Fetch data pointed to by top of 
stack (TOS) |
+---------+---------------+--------------+---------------------------------------------+
|  DUP    |      x        |     x x      |              Duplicate the TOS       
       |
+---------+---------------+--------------+---------------------------------------------+
|  DROP   |      x        |      -       |            Discard top of stack      
       |
+---------+---------------+--------------+---------------------------------------------+
|  SWAP   |     a b       |     b a      |              Swap TOS and NOS        
       |
+---------+---------------+--------------+---------------------------------------------+
|  AND    |     a b       |   a AND b    |               And TOS and NOS        
       |
+---------+---------------+--------------+---------------------------------------------+
|   OR    |     a b       |   a OR b     |               Or TOS and NOS         
       |
+---------+---------------+--------------+---------------------------------------------+
|  XOR    |     a b       |   a XOR b    |         Exclusive or of TOS and NOS  
       |
+---------+---------------+--------------+---------------------------------------------+
| LIT N   |      -        |      N       |                Put N on TOS          
       |
+---------+---------------+--------------+---------------------------------------------+
|  ADD    |     a b       |    a + b     |               Add TOS and NOS        
       |
+---------+---------------+--------------+---------------------------------------------+
|  SUB    |     a b       |    a - b     |            Subtract TOS from NOS     
       |
+---------+---------------+--------------+---------------------------------------------+
|   NZ    |      a        | -1 if a !=0  |   Put -1 on the stack if TOS is not 
zero    |
+---------+---------------+--------------+---------------------------------------------+
|  LSL    |      a        |   a LSL 1    |          Logical shift left of TOS   
       |
+---------+---------------+--------------+---------------------------------------------+
|  LSR    |      a        |   a LSR 1    |         Logical shift right of TOS   
       |
+---------+---------------+--------------+---------------------------------------------+
|  ASR    |      a        |     a/2      |        Arithmetic shift right of TOS 
       |
+---------+---------------+--------------+---------------------------------------------+
|  PCR    |      a        |    PC+a      |            Make TOS PC Relative      
       |
+---------+---------------+--------------+---------------------------------------------+

TOS = Top Of Stack
NOS = Next On Stack

Program flow operations:

+---------+---------------+--------------+------------------------------------------------------+
| Opcode  | Stack Before  | Stack After  |                     Description      
                |
+---------+---------------+--------------+------------------------------------------------------+
+---------+---------------+--------------+------------------------------------------------------+
|  CALL   |      N        |      -       | Place PC on top of return stack and 
copy N to the PC |
+---------+---------------+--------------+------------------------------------------------------+
|  BNZ    |     a N       |      -       |             Branch to PC+TOS if NOS 
!= 0             |
+---------+---------------+--------------+------------------------------------------------------+

I hope that comes out okay.. It's a cut and paste straight out of Lyx.

Falcon is supposed to be a 4-issue superscalar multi-stack machine, so I
am missing the ">R" and "R>" opcodes to manipulate the call-return
stack, and I have removed all the "weird" VLIW stuff I came up with. For
a complete Forth, we would need:

>R      Move TOS to Top Of Return Stack
R>      Move Top Of Return Stack to TOS
>       Put -1 on the stack if (signed) NOS > TOS

We could trim a few and add a few, depending on what you think we would
need.

Once you are happy with an instruction set, I could provide you with an
assembler and emulator pretty quickly I think. You would probably be a
better person to implement the HDL than me though - I currently don't
have a toolchain set up, and I don't think of myself as being all that
good at VHDL.

I have attached an example output from my tokenizer and parser, for the
extended instruction set... it should hopefully give you a feel for the
what the assembler expects, barring the parallel opcode stuff. :-)

Keep well,
Ray
(Nurf on IRC)
Listing:

    1  FAsm ExampleCode
    2  
    3    .imagesize 65536
    4    .imagename "snsForth.img"
    5  
    6    .org 1024
    7  
    8  main:
    9          1. NOP          2. NOP          3. NOP          4. NOP  ; 
Comment 1
   10          1. LIT 200                      3. LIT 1                ; 
Comment 2
   11                          2.NOP
   12  loop1:  1. LIT 1
   13          1. SUB
   14          1. BNZ loop1:
   15          1. RET
   16    .org 0
   17  loop2:  1. BNZ loop2:
   18  
   19  END
   20  
   21  


    0 syntax errors
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