I've been working off and on on the software model for the VGA core.
Right now, it has a complete register set that can be read from and
written to. That's about it. Most of the registers are implemented as
locations in the card memory instead of being fixed registers in the
chip. For some, this may change, for some not (see my previous email
with the chat with Timothy). The Doxygen docs are up for your viewing
pleasure here - http://www.supersecret.org/~mcnamara/openGraphics
The code is still being cleaned up for public consumption and my next
task is to add the read and write pipelines into the model so I can
actually put data in the VGA buffer. I also want to start studying
Viktor Pracht's nanocontroller code to see how easily I can shoe horn it
into the model.
The ultimate goal is to add the 3d pipeline simulator in and have a
complete software model of the final chip, something we could use for
testing ideas as well as possibly adapt to use with Bochs or Qemu to
start driver development against.
Patrick M
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