On 12/8/05, Timothy Miller <[EMAIL PROTECTED]> wrote: > On 12/8/05, Jon Masters <[EMAIL PROTECTED]> wrote:
> > So, I'd like to do standard interview/press things as and when you > > guys have something fun you'd like to promote. > Sure. What we have right now is some design specs, some C++ code that > describes what some Verilog code will do, and we have some Verilog > code for a few things. I saw. > > I'd also appreciate > > knowing when hardware HDL (Verilog/VHDL) designs are made available > > publically (if ever) as I've a stack of Xilinx kit kicking around and > > a penchant for hacking on it. > > Some of it's immediate. Some of it will be under a time delay. But > it will ALL be released within a reasonable timeframe. We're also > going to release other things that aren't code, like the PCB > schematics, etc. Ok. That'd be nice integrated with balloon or a sufficiently "open" hw platform sometime. Like I said, I'm happy to test stuff. I should have an ML403 board in the new year too with enough gates to be reasonably serious. The magazine (www.linuxuser.co.uk) will be happy to run a story on this in due course - perhaps we can have coffee sometime too. Jon. _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
