On 3/4/06, Attila Kinali <[EMAIL PROTECTED]> wrote: > That's the reason why we have a CPLD and an FPGA. The CPLD is > there to programm the FPGA. I did not check yet how easy the > CPLD is to flash, but that shouldn't need more than one small connector.
That isn't true anymore, actually. The Xilinx had an expensive prom, so we were going to use the Lattice to program it from the same PROM that held VGA. The ECP2-50, on the other hand, can program itself from an SPI PROM directly. We now have two SPI proms. One for VGA, and one for the bitfile. There's still reason to have the smaller FPGA, though. The time it takes for the ECP2-50 to program itself is long enough that some systems may not find it on the bus. The smaller one is flash-based and therefore instant-on. Note that you can still reprogram the big one from the small one, in a couple of different ways. _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
