On Sun, 2006-05-14 at 18:42 -0400, Timothy Miller wrote:
> On 5/14/06, Ray Heasman <[EMAIL PROTECTED]> wrote:
> 
> >
> > This is one of my problems with the OGA design.. I think it's too much
> > with too high NRE costs...
> >
> 
> I have no problem with the idea of trying to cram a simple 2D design
> into a cheap FPGA and selling that as a complete solution.  That was
> my ORIGINAL plan, in fact.  We can use OGD1 as the basis for fleshing
> out those ideas.

It would certainly make me feel a lot more comfortable that OGP will get
traction in the long term.

> Imagine fitting everything into the XP6 part on OGD1.  I don't know if
> that's possible, really, but it would be interesting to try.
> 
> Minimum of what we need:
> 
> - Video controller
> - Memory controller
> - Host interface
> 
> Cheap things to add:
> 
> - Some format conversion (8-bit emulation, for instance)
> - Simple bitblt engine (which gives us solid rectangle fill for free)
> - Hardware cursor
> 
> Slightly more powerful but still relatively cheap:
> 
> - Trapezoid fill (subsumes bitblt and rect and adds triangles and lines)
> - Fixed-size patterns (limited color tile and stipple fills)
> - Planemasks and raster ops
> 
> I can keep adding layers on this, but you get the idea.  We do one and
> see how big it is, estimating cost of various fabrication methods
> (cheap flash-based FPGA being the preferred).  If there's room, add
> something.  Lather, rinse, repeat.

I like this idea. It's not flashy, but we'll always have something that
could go out the door if a customer appeared.

Just looking at the features you are talking about adding in layers, I'm
trying to imagine the kinds of things people want to do. I'm thinking
mostly custom GUIs, with some scrolling, buttons being "pushed" in an
out, but not a whole lot in the way of moving windows around. I think
scrolling is probably very important.

Here is an idea that has been done multiple times over the years. Why
not have a simple display description language so we can avoid copying
data?

The idea is that if we have spare bandwidth on the DRAM (enough to
compensate for frequent non-sequential address changes), then some sort
of simple structure could be used to represent the screen display, and
the RAM could be read out nonlinearly at display time. So, instead of
drawing a frame by reading a linear buffer, and competing with that when
blitting, we make the display counter hop around to find the data. This
would allow really cheap scrolling and could replace blitting a lot of
the time.

The display language could be as simple as "address, count" repeated
over and over, meaning fetch "count" pixels from "address". That would
allow scrolling any part of the the screen in any direction with
relatively few updates to the display list, or would allow replacing one
bitmap or framebuffer with another by changing some pointers.

If someone wanted an 1024x768 linear framebuffer, they could just have
one entry in the display structure saying "addr = x, count = 786432",
and treat address x as a linear framebuffer.

I haven't looked at DRAM for quite some time. Would the latency on
address change kill us?

> I forget what the XP6 costs.

A quick check on Arrow shows around $30 in very small quantities.

> Perhaps someone here remembers.  It's
> not very expensive.  But what would be the demand for a card buildable
> on this?

I'm not sure about desktop systems if it's just 2D and based on a $30
FPGA. I'm not sure how much the final card would cost. One "special"
feature could be enough of a differentiator, if I knew what it was. :-P

Maybe as a PC104 module? Like this? :
http://pc104.winsystems.com/products/pc104/pcmfpvga.html

That card uses a C&T chip. Seems C&T chips are now sold by Asiliant:
http://www.asiliant.com/products.htm

Doesn't look like there is much life there; I doubt anything new is
being designed at Asiliant. There might be wiggle room for OGP here.

>   Here's what it'd be like:
> 
> - Single head (DVI-I with analog and single-link DVI, no TV)
> - One DDR400 ram chip (32 megabytes)
> - 200 million pixels per second total memory bandwidth
> - 32-bit pixels only
> - Absolute minimal text-only VGA support
> - No VESA support (due to the lack of VGA graphics)
> - Acceleration only for bitblt and solid fill
> - Not much room for off-screen pixmaps
> - Maybe a hardware cursor
> 
> I'm not even sure this could fit in the XP6 we've chosen, although
> there's probably a bigger (but more expensive) one we could use.
> Usually, more integration is less expensive, but with FPGAs, it's the
> other way around.  Two small ones are cheaper than one large one.  We
> could split the design across two FPGAs for this.

I think I could see play if it were made into a cheap ASIC. The price
would be low enough that it could see use in lots of little niches.

As an FPGA solution it would need a little more secret sauce, I think.
Not sure what that could be.



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