On Saturday 27 May 2006 18:08, Timothy Miller wrote:
> On 5/27/06, André Pouliot <[EMAIL PROTECTED]> wrote:
> > Some synthetizer accept both language in the same design. But it must be
> > by doing call to the others block. For example you have the spi prom
> > interface in vhdl you instanciate it in a verilog design, the contrary
> > could also be true. One simulator who can do that is "modelsim". For the
> > synthesis there is "Precision Synthesis" who can also do it. Normally
> > fpga company their synthesis program have a interface module for
> > precision synthesis.
> >
> > Only problem with these software is the cost. For the rest they work
> > like a charm and if I remember correctly they work in windows, linux,
> > hp-ux and solaris.
>
> I can see that this language issue is going to be a problem.  Any
> ideas as to how to deal with it?  Lessons on the two languages?  Who
> is willing to buy a book?  I can point you to one that teaches them
> side-by-side.
>

Depending on price, I could be interested. (I'm always interested in learning 
new languages).

If you give me the isbn's & titles I can see how much they'd cost me (Or my 
company).

> Also, anyone who knows either language should all be able to read and
> tweak the other, given existing code, right?
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