I attach a new version of the SPI controller. It includes most of the hints from you and Howard, but
* I didn't introduce the state reg since I found that the state was
already
implied by the other variables. Instead I added comments to indicate
states.
* I'm not quite sure I understood your comment about busy and
read_out_valid, but read_out_valid is now asserted 10 ns after the read
data is valid. Also, note that read_out_valid is kept high until
there is
another request that will invalidate the buffer.
Some notes:
* In the test case of your orginial post, you wrote
do_read = 1;
while (busy) #20;
#20;
I assume this should be
do_read = 1;
#20;
while (busy) #20;
for otherwise, we could not register 'busy' and we'd need some extra
logic.
* The current proposal is to use 32 bit writes to configure the device.
This does not cover read-status-register and read-ID. For the latter, I
have assumed that byte-enables are also available for reads, so that we
can use 4'b0001 for read-status-register and 4'b0011 for read-ID.
Otherwise, maybe we could feed the MSB of the 32 bit address to enable
any configuration.
The configuration is not well-tested. Maybe someone else on this list wants
to complete the PROM simulator? That way it's more likely to catch errors
due misreading of the SPI specs.
spi_prom-0.1.tar.bz2
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smime.p7s
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