It probably will fit on a large 250nm die. However, 250nm is quite
slow, power hungry and there are end-of-life issues.
A good compromise would be in the 130nm to 180nm range,
where mask sets are in the order of a few hundred thousand
dollars.
On 6/20/06, Jack Carroll <[EMAIL PROTECTED]> wrote:
Somebody pointed out to me yesterday that a mask set for a 250 nm
process isn't $2M, it's $50K. And that's on SOI, which is much faster than
a normal 250 nm process, because it eliminates isolation junction
capacitance.
How much logic is the TRV10 going to need? Could it be implemented
with an older CMOS or SOI process that doesn't have such prohibitive
up-front costs?
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