On 8/1/06, Patrick McNamara <[EMAIL PROTECTED]> wrote:
On the SPI front, Timothy mentioned the possibility of an SPI EEPROM on board already. Suppose we have a 512byte EEPROM for config info and the controller reads that plus another 512 bytes from the bus. That second part can be anything we want it to be. My assumption is that it would be from whatever was connected to the headers, 0xFF if nothing was there as someone else mentioned. The BIOS can then do whatever it needs to with this info once the card is under processor control.
Are you talking about a PROM on the board? What's wrong with reserving some space in the one already on there? Or am I missing something here? I like the idea of doing double-duty with the SPI bus for an external device. But when it comes to storing anything on the board, we have a PROM already. _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
