Timothy Miller wrote:
I'm not sure where to put the dirty flag.
I still think in terms of building stuff with separate parts. :-) In
that case, you would have an 8K x 1 bit dual port SRAM for the 'dirty'
bits and a decoder for chip select so that it would parallel the RAM
that was used for the character buffer (8K x 16). So with an ASIC, I
suppose that you would have a small SRAM on the chip for that purpose.
Note that 132 x 60 characters is the largest VESA character mode. 132 *
60 = 7920 or 7.734375 K.
--
JRT
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