On 8/25/06, Jon Smirl <[EMAIL PROTECTED]> wrote:

> As a fallback, I would provide a command that could do arbitrary
> register writes, but it would be seldom used.

I haven't looked into the reasons, but I suspect most commands run
long enough that there is no need to pack them. Pipelining hides the
large command size. Plus large is a relative term, no matter how
inefficent the packing most command streams are tiny compared to the
data they operate on. ATI has a set a command opcodes - set 1
register, set 2 registers, set 3 registers, etc.

I've done all this before, and I can assure you that MANY commands
take less time to submit than they do to execute, especially if PCI is
the bus.  With 3D, we'll get lots of tiny triangles that are also
faster than the bus.  Packing is vital for throughput.

Plus, why waste the bandwidth, even if you have it to burn?

And Radeons have packed packets.

Isn't this easier to build than packed commands?

No, I'm planning to use an onboard microcontroller (that I've been
working on) to manage DMA.  It's a simple matter of writing some RISC
code (once) to process it all.
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