On Mon, 04 Sep 2006 19:06:16 +0200
Petter Urkedal <[EMAIL PROTECTED]> wrote:
> Maybe Viktor's idea of hooking into an emulator would be a more
> realistic test, and would possibly even be easier to implement. The
> emulator would of course be severely slowed down by the hardware
> simulation, so this would only supplement the OGD1 for full-system testing.
I'm currently looking at bochs. But the codebase is not small
and it will take some time until i can say how much of it
is usable and how much needs to be written.
> > I thought a little bit about it and came to the conclusion that
> > we should not simulate the pci interface together with the
> > driver. For one thing it becomes a huge system to simulate
> > (ok, the graphics core is much larger). And for another
> > we would need to first translate accesses to oga first into
> > pci accesses, just to translate them back again. It would
> > be simpler just to take the raw accesses the driver makes
> > and translate them into logical accesses to the card directly.
> >
> But does testing benefit from shortcuts? If my experience with software
> carries over here, I think both unit testing and full-system testing can
> expose bugs that either could not reveal by itself. Units tests have
> the advantage that they can cover large part of the domain, including
> implausible cases. I sometimes run randomised tests overnight, and ever
> now and then I hit bugs even after hours of running rather simple code
> (like 32 KB). These might not have been found by the large-scale test.
> OTOH, a full-system test could reveal misunderstandings about the
> interfaces of the individual components. In this case the PCI
> controller could produce what is more likely to be realistic signals for
> the connected units.
Full Ack. But we have to be efficient. It will take us 1-2y to
develop the logic for oga anyways. Even without extensive simulation
testing. And testing it on OGD1 will be faster and more acurate
than simulation. Of course, when we hit a bug on OGD1, we need
some way to reproduce it in simulation.
But actualy what i'm more worried about is how we will do
production testing of TRV1. We don't really have the space
to waste on the FPGA for test structures, but those test
structures have to be developed and tested too.
> BTW, I consider the HSIP library ready for use after yesterday's commit,
> but I'll add some functions to deal with high-impedance signals.
Ok. That's next after bochs.
Stay tuned
Attila Kinali
--
egp ist vergleichbar mit einem ikea bausatz fuer flugzeugtraeger
-- reeler in +kaosu
_______________________________________________
Open-graphics mailing list
[email protected]
http://lists.duskglow.com/mailman/listinfo/open-graphics
List service provided by Duskglow Consulting, LLC (www.duskglow.com)
