Some things could be more clear. Herafter my understanding and point of
view.
/*quote
*What is at the heart of the OGP card?*
At first, the OGP card will be implemented using a fairly powerful FPGA
(Field Programmable Gate Array). FPGAs are like the custom-made chips
used in computers and other devices, but they can be reprogrammed at any
time. This makes them wonderful for development, and hardware designs
using them do not require high up-front costs to produce. The downside
is that they cost more per unit to use in a design. Once the design is
fleshed out and debugged, it will be fabbed as an ASIC? for lower
per-part cost and higher performance.
end quote*/
AFAIUnderstood, the OGP card is a development board, so, by definition,
its chip is programmable, hence it's a Fpga or a CPLD but not an ASIC.
Maybe I'm wrong, but I've always understood that fabbing an ASIC is for
the end-user's graphics card, that is to say, the OGC, not OGP. So, one
should write this in first :
/*review
*What is at the heart of the OGP card?*
the OGP implements a fairly powerful FPGA (Field Programmable Gate
Array). FPGAs are like the custom-made chips used in computers and other
devices, but they can be reprogrammed at any time. This makes them
wonderful for development, and hardware designs using them do not
require high up-front costs to produce.
*What is the use of the OGP card?*
The OGP card is a prototyping and development board, not a graphics card
for the end-user. Once the design is fleshed out and debugged, it will
be fabbed as an ASIC?/*<-link to FPGA page since those topics are
correlated in this page*/ for lower per-part cost and higher
performance, thus, something more suitable for the end-user.
end review*/
/*review
*I heard this card may use a FPGA, are we going to get the 'source' for
what is on the FPGA also?*
YES.
There are three different sets of "source code" that will be available:
source code to device drivers; RTL for the FPGA-based product; RTL for
the ASIC.
The RTL is the closest equivalent that hardware designs have to "source
code", it's a C-like language called Verilog that describes circuit
paths in the chip.
* __Source code to device drivers:__ All device driver code
(including BIOS) written for the OGP will be released under MIT and BSD
licenses. These licenses allow code to be used freely in open source and
in proprietary software, without the "viral" nature of the GPL, as long
as copyright notices are retained.
* __The RTL for the FPGA-based product__ (a prototyping and
development board) is already being released under a dual license (GPL
and proprietary).
* __RTL for the ASIC__ will be released under a dual license (GPL
and proprietary). There will be a time-delay on some parts (to deal with
investor concerns over the $millions necessary to invest in
fabrication), but once the investment is recouped, the code will be
released. (We need a law firm to escrow the RTL for us, pro bono.)
end review*/
By this way, it's more clear:
- no dread if one wants to write a driver
- develope with everybody or develope alone
- undiscontinued product, it's just a matter of cash and viability
Le samedi 09 décembre 2006 à 20:09 +1300, Josephblack a écrit :
> I have been updating some of the wiki and need to pop a query regarding our
> FAQ
>
> What is the latest for the question: Will this card support TV out?*
> http://wiki.duskglow.com/tiki-index.php?page=FrequentlyAskedQuestions
>
> will it be possible to run tvout and DVI? And what are the options for ODG1
>
> Also apologies to NicolaiH%E4hnle - I had to force the link to your
> name, so plse check we have your name right.
>
> if there any other errors/updates post to the list so we can update
> them too. Even if a section is unclear - do ask. If those who have
> been following the list find it hard to understand then we need to fix
> it for our visitors who are reading it for the very first time.
> jb
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