There are a couple of things relevant to your question:
On page 2 of the schematic, top left, you should see a set or series
current-limiting resistors connecting PCI to the XP10.
Page 144 of the XP handbook discusses PCI and 5V tolerance.
On 5/2/07, Attila Kinali <[EMAIL PROTECTED]> wrote:
Hi,
I just had to evaluate some FPGAs for work to be used
as PCI interfaces in a mixed 3.3V/5V enviroment. Because
there are very few FPGAs that can tolerate 5V at their
input while running at 3.3V i checked out how OGD1 is doing
it, just to realize that the XP10 (resp XP6 in the old schematics)
does not tolerate 5V inputs according to the datasheet (unless i
missed something).
As the revision G of the schematics of OGD1 do not contain
any interface logic between the XP6 and the PCI bus, it
raises the question how the XP6 is made 5V tolerant.
Or is the assumption that all PCs out there use 3.3V only
these days?
Attila Kinali
PS: does anyone know a cheap EEPROM based FPGA that is 5V tolerant?
--
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But blest in my name forever this stream that stanched my thirst!
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Open Graphics Project
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