-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Timothy Normand Miller wrote: > On 7/11/07, Stephen Warren <[EMAIL PROTECTED]> wrote: >> -----BEGIN PGP SIGNED MESSAGE----- >> Hash: SHA1 >> >> Timothy Normand Miller wrote: >> > Note: We looked at it with a PCI bus analyzer, and what we see is >> > that the x.org code results in long bursts, while ours results in >> > individual transactions, which would explain why we're so slow. What >> > could x.org code be doing that would result in bursts, while ours >> > doesn't? >> >> Probably, the dcache generates bursts during write-back/flush and CPU >> generates single-beat accesses when writing to uncached areas (or >> write-through cache?) > > Is there something you can do when mapping memory that will set > whether it's cached or not? We're just doing a simple mmap in our > test software, while we're using some xf86 function in the X server.
I imagine so, but I'm sorry that I don't know exactly what, beyond anything the "man mmap" might say. One thing to check; PCI BARs have a flag that says whether they're "memory like" (or something like that) which could automatically affect the region's cache-ability (either in HW, or due to the kernel's interpretation of that data). I assume that the device's registers and frame buffer memory are in separate PCI bars; that would be a sensible setup. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.2 (MingW32) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org iD8DBQFGlWlkhk3bo0lNTrURAmNWAKCKnfhoysyneC8BWHX8JlTfDniJ8ACfQzqr BdnABB6JFmr7Cxz20L2hico= =UGco -----END PGP SIGNATURE----- _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
