I think we can afford to use 8 bits for encoding registers. That leaves
us 8 bits of the instruction word for other uses, which is sufficient in
the current version. Further, we don't need to split evenly between
register kinds, so maybe something like
q0..q31 previous frame registers r0..r31
r0..r63 current frame registers
g0..g127 global registers
s0..s31 IO-registers
would be more useful. We should keep in mind, though, that we no longer
have computed addresses, so we can't e.g. do table lookups. That is,
unless we have a spare memory block which we connect to two of the
IO-registers. (We have not quite walked in circles.)
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