Ok, top-level modules are ready to be handed off. These give internal names to the pins on the chips. All the internal logic for the FPGAs goes inside of these. I need someone who will take control of these, maintain them, and verify them against the schematic. They're 90% done, so there's not a lot of work left to do here.
The next part of this subproject will be to do the "pad ring", which are just a couple of config files for the synthesizers that indicate which pins connect to which top-level ports. I'll give you a 90% complete version of that too soon. Who want this one? This one requires someone who has no more technical background than like HTML coding, because it's just a lot of "repeat this pattern but with that other name." Good opportunity for someone who's really new to this to get their feet wet. -- Timothy Normand Miller http://www.cse.ohio-state.edu/~millerti Open Graphics Project _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
