Timothy Normand Miller: >This is more of a stating point than a proposed design and request for >comment. Some more thought needs to be put into how other blocks >communicate with this (fifos, etc.), and we need to work out the >issues associated with the two-cycle latency of any signals crossing >the bridge (busy signals, etc.). >
Hum, I played somewhat around with the idea of a bus protocol this weekend, but I didn't get around to formalizing it into a mail. However, I had some other idea that might be interesting regarding multi-byte transmissions. Something that stroke me as interesting would be to skip transferring the count in a own byte, and instead assert a continuous signal, leaving the guest side to increase the local memory address by the word size for each data word it receives/sends. It however, allows us skip sending a single word describing the amount of data to read / write. Another idea I had was to use some of the control signal to specify a partition of the Spartan3 chip we want to communicate with. The practical implications of this is to extend the address space by X bits, but it might be useful if we want to separate the address ranges on the chips. I.e., having different 2^32 address domains. It also makes sense in the case where we want to extend with daughter boards, allowing addressing in a separate domain. Hope it somewhat made sense, Kenneth -- Life on the earth might be expensive, but it includes an annual free trip around the earth. Kenneth Østby http://langly.org _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
