There are a handful of things left to code. Some of these are the sorts of things that Howard is best suited for. Those include clock managers and constraints files. The XP10 top level is basically done, and Howard will be sending me some code this week.
The S3 still needs work. I've been trying to get some people to help me check the connections, but no one's reported anything to me. Wiring top levels (getting the wire instances right and stuff) are my greatest weakness. This is where I make the most mistakes. This kind of checking has to be done first. Right now, I have one memory controller and one video controller wired up. After the checking, we can wire up the remaining 3 memory controllers and 1 video controller (along with the output blocks), and check it again. Still, there will be details that remain to be fixed. Finally, we need to create a simulation wrapper that binds together the two FPGA top levels, a PCI master that is in the repository, and some test code that tries out various basic functions like accessing memory and scanning out a video frame. This too falls squarely into where-I-suck territory and would be done much quicker and better by someone with far greater talent with this kind of detail. The break is nearing its end, and I need help with these things. The next step after that is synthesis and fixing things to meet timing. Those are things I'm good at. It would be best if we can get this simulation stuff done before classes start before we work on synthesis. -- Timothy Normand Miller http://www.cse.ohio-state.edu/~millerti Open Graphics Project _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
