We've had OGD1 working as an unaccelerated non-VGA framebuffer device
working for some time now.  On and off over the last month, we've been
working out the major show-stopping bugs in HQ (the MIPS-like
microcontroller we developed to emulate VGA).  One of the major
development problems was that, unlike the Xilinx tools, the Lattice
synthesizer seemed to be unable to infer and properly deal with the
relationship between the primary clock that runs most of HQ and the
double-rate clock that ran its 3-port register file.  We worked around
that by duplicating the register file (possibly not actually
increasing the amount of logic dedicated to it), running it on the
primary clock, and extending the results forwarding mechanism to
handle simultaneous read and write-back to the same register.  It
turns out that with the 2x clock, about the fastest we would have been
able to run HQ was about 50MHz.  With these changes, we can run it
easily at 80MHz.  Our target is at least 100MHz, but at the moment,
this is acceptable for development purposes.  We'll defer further
optimization to a later time so that we can concentrate on the details
of making VGA work.  The first step is do develop just enough HQ
microcode and x86 BIOS code that we can trick a PC into thinking it's
a real VGA card; the objective is to be able to boot into Linux
without a functional display so that we can incrementally develop the
code that will make VGA actually put up a working display.

-- 
Timothy Normand Miller
http://www.cse.ohio-state.edu/~millerti
Open Graphics Project
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