I have one out-standing commit to SVN, but I don't think it's all
correct. The important bit is that the bit flags for the memory
targets should change, unless they're shifts. Also, I had made a hack
to some addresses, but I'm not sure if they're right. I'd rather that
someone like Howard or Petter figure out what's right here and make
the commit.
Here's my diff against head (in the new repo).
Index: hqio.asm
===================================================================
--- hqio.asm (revision 471)
+++ hqio.asm (working copy)
@@ -21,12 +21,10 @@
;;; Authors: Petter Urkedal, Timothy Normand Miller
;; PCI Target Numbers
-let PCI_TARGET_CFG = 0 ; (not seed by HQ) configuration
let PCI_TARGET_ENG = 1 ; engine
let PCI_TARGET_MEM = 2 ; memory
-let PCI_TARGET_VMEM = 3 ; video memory
-let PCI_TARGET_IO = 4 ; IO
-let PCI_TARGET_PROM = 5 ; (not seen by HQ)
+let PCI_TARGET_VMEM = 4 ; video memory
+let PCI_TARGET_IO = 8 ; IO
;; PCI Ports
@@ -68,8 +66,8 @@
let _MEM_B = -0x40 ; base address for memory ports
let MEM_CMDQ_FREE = _MEM_B + 0x00 ; in - free slots in command pipe
-let MEM_SEND_ADDR_MEM = _MEM_B + 0x08 ; enq - address for memory read or write
-let MEM_SEND_ADDR_ENG = _MEM_B + 0x09 ; enq - address for engine read or write
+let MEM_SEND_ADDR_MEM = _MEM_B + 0x09 ; enq - address for memory read or write
+let MEM_SEND_ADDR_ENG = _MEM_B + 0x08 ; enq - address for engine read or write
let MEM_SEND_READ_COUNT = _MEM_B + 0x0f ; enq - do a read of given word
count
let MEM_SEND_DATA_0000 = _MEM_B + 0x10 ; enq - 16 ports for data stream, where
; lower 4 address bits are enables
--
Timothy Normand Miller
http://www.cse.ohio-state.edu/~millerti
Open Graphics Project
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