This release is the result of some light cleanup after a long hiatus. I've invested about another man week in the project (4 man weeks total). I've done a couple more HDL designs in the past two+ years (wow!) since a release and have learned a bit more about VHDL and FPGAs. To handle metastability issues (I did not understand the importance of this in release #2) I've added synchronizers to the reset and to the signals that cross clock domains across the design. I've stuck a broom into most corners of the design, and most modules have been somewhat improved.
The eppcu was cleaned up primarily to make the code a bit simpler to read. The PixelPusher module was improved mostly by separating the display pixel clock from the main logic clock. I realized the old design was a bit dumb in that the Xilinx block rams have two independent interfaces and I was not using this feature. I now fill the scanline caches from one port, and pull pixel data out from the other in the pixel clock domain. As a result of these changes, the scanline caches have a much simpler design, the PixelPusher module itself is just a shell, and all display timing generation is handled in a new DispDriver module. I believe the synchronous reset signal was the slowest bit of logic in the TVC design, so to improve timing here I've begun to move to a FPGA centric reset design that relies on all device flip-flops being initialized to a certain state by the bitstream upon download. Stripping out logic related to the (user) reset has made more available to other functional units. I certainly do not intend to totally remove the user reset; enough will remain to initialize the major state machines. As I don't intend to move this design to an ASIC, I think this is an ok change to the code. I have made many improvements to Engine (the included software 3d engine/driver). I have extended Engine to include simple (software only) texture mapping, and the included demo demonstrates this. I implemented a simple file format that allows specifying 3d textured triangles to be used by engine. I store texture data in independent ASCII ppm files. Finally I implemented into engine a proper 4x4 coordinate transformation. After the above groundwork, I believe it will be quite straight forward to implement simple nearest pixel texture mapping (slowly) in hardware. As I am almost out of gates in my current development kit, I'll be moving to a different platform soon. I have not bothered to fix the rendering bugs demonstrated by the polygon scanline functional unit as a move to a new development kit (with either SDRAM or DDR SDRAM) will make the current memory controller obsolete. To download TVC release #3 see http://www.johnculp.net/tvc.html -John _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
