On Mon, 16 Jul 2012 17:19:39 +0200, Mark Marshall wrote:
Hi.
hi !
I think that divide and inverse square root would be nice to have,
but
I understand that they are costly in terms of area etc..
inverse square root has been addressed in one of my recent messages,
it does need just a lookup table that can be held in cache
or a little "seed" instruction.
There are some other functions that we could have in hardware, but we
can possibly work around with the other operations (power, sin, cos).
If we decide not to have full divide, square root, etc. has anyone
thought about having a half-way instruction that would produce a good
first estimate. Other chips (IA64?) have these instructions. If we
can get half or a quarter of the bits of accuracy that we need from
and initial instruction then completing the result is much easier. I
thought about adding a reciprocal instruction, but that's not much
easier to calculate that a full divide.
Inverse square root approximation is easy,
read my recent posts about this.
I was also wondering if it was feasible to split the divide up into
two opcodes, the first opcode would do half of the work and would
leave the partial result in some special flip-flops. The second
op-code would complete the operation and put the result in the
correct
place (I know that this is a bit nasty, but it lets us extend our
pipeline to almost any depth we need).
Definitely no-no because then the operation sequences are not atomic
and would lose their state in case of context swap.
Plus it is not adapted at all for a barrel CPU.
I'm keen to hear your thoughts.
read the mailing list archives ?
Mark Marshall.
Yann
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