How the GPU simulator is modularized into objects is not quite the same as how a circuit would be organized. For instance, with the simulator, there would simply be arrays of thread processors, containing arrays of shader pipelines, so we don't have to think too hard about their physical arrangement. But we do have to implement each of the functional modules, like the rasterizer, memory scheduling, kernel scheduling, etc. And all of it, for now and mostly forever, is a timing simulation that doesn't need to know so much _why_ it has that timing. That is, as long as the memory controller properly simulates energy and pipelining latencies for its own operations and I/O, it doesn't have to be architected the same way as a real memory controller.
Here's a preliminary diagram. Once I get some more feedback, I'll put it into the git repo. http://www.cs.binghamton.edu/~millerti/sim-modules.pdf -- Timothy Normand Miller, PhD http://www.cse.ohio-state.edu/~millerti Open Graphics Project _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
