There are also other things involved in that:
- I was aware, that for 1080p60 you need about 3Gb/s, so that would
not be possible on Gen1 PCIe. Gen 2 is quite rare, to be present in such
small form factor.
So the target would be to :
- directly drive a lower resolution LCD's (lets say up to 1280x800) -
either LVDS or eDP
- output 1080i, thats just half of the above (1.5Gbit) - either HDMI
(without any external IC) or HD/SDI (just a small cable driver)
- drive a newer eDP panel, with any resolution since the standard
defines a memory integrated into the LCD panel (with self-refresh)
Another advantage:
- internal memory in the FPGA can be used for text mode.. so you
could even have access to BIOS without the DMA involved
So...
how do we calculate the PCIe efficiency?
On the opposite side, a single 16b DDR3 can give us 12.8 Gbit (at
800MHz - estimation with Spartan 6 class devices, they got a 3Gbit GTP
for pcie/hdsdi).
Daniel
On 11/13/2012 04:51 PM, Timothy Normand Miller wrote:
Well, let's think about that for a moment...
Let's say we're doing 1920x1200 in 24-bit color at 60hz. That's 527
MiB/sec. This is slightly more than 2 PCIe 1.x links. If we're smart
and only transfer 3 bytes/pixel, that's almost 400MiB/sec. How much
power does it take to run two PCIe 1.x links continuously?
If we have on-board memory on the graphics card, we can calculate the
additional power from adding the extra memory.
Everything else should be the same. Same video controller, similar
memory controller to the host, etc. We can determine the power
necessary to run PCIe. So the tradeoff is some proportion of extra
memory versus PCIe link bandwidth. There are other hidden costs, but
I expect them to be minor.
On Tue, Nov 13, 2012 at 9:50 AM, Nicolas Boulay <[email protected]
<mailto:[email protected]>> wrote:
Even a single DRAM chip using 16 bits bus, will be much faster than
using the PCI-e link for video memory.
You could have few MiB on chip, but DRAM chip are 256 MiB now.
Beside that, having a fully internal frambuffer, could save a lot of
power for pure 2D graphics. But today graphical server wait arround
32/128 MiB to do compositing.
2012/11/13 "Ing. Daniel Rozsnyó" <[email protected]
<mailto:[email protected]>>:
> Thinking again of my minimalistic mini-pcie graphics card... can
a PCI
> device initiate a transmission of a memory block? (DMA/bus-master).
>
> Then it would be even possible to leave out the local memory on
the card, so
> it is one chip less and a lot easier PCB design (cons are that
the bandwidth
> might be limited by the 1x pcie interface to 2.5G or 5G).
>
> Can anybody confirm that this might work ?
>
>
> Daniel
>
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--
Timothy Normand Miller, PhD
Assistant Professor of Computer Science, Binghamton University
http://www.cs.binghamton.edu/~millerti/
<http://www.cse.ohio-state.edu/%7Emillerti>
Open Graphics Project
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