Ing. Daniel Rozsnyó wrote:
Hi James,
I think the programmable logic chip (FPGA) would do the PCI "physical
layer" and either a FIFO for memory writes, or a memory required for VGA
image buffer (32kB?).
This list, OHE <[email protected]>, is for a video
adapter connected to Ethernet rather than the motherboard bus so that
wouldn't be needed. For an internal card, I would personally use a
commercial (probably PCIe) bus interface chip since there is no point in
reinventing the wheel -- less power and less expense than using a FPGA.
The VGA would be simpler to emulate via FPGA than
via software, mostly because of timing. And it would require something
like Spartan 3E-500 (the largest in 208 pin package with normal legs).
I would rather see this chip in place of accelerating video decoding -
you can put this small FPGA with hardcoded VGA and the let the TI to
decode video streams into an overlay memory.
That is a trade off. Since VGA is not used when a GUI operating system
is running, I see little point in implementing it in hardware when it
would only be used for boot and text console. If VGA was only accessed
with the BIOS interrupts, there would be no problem implementing that
totally in hardware and it would be much faster since the code would run
on the ARM rather than the host processor.
However, some software or firmware does access VGA directly -- something
that should be looked into: do we still need this? or are text mode BIOS
calls all that is necessary? What do BIOSs use for boot and set up text
mode? For direct hardware access, you do need a chip that can handle
the reads and write to I/O and video RAM addresses. The original VGA
chip was for an AT bus which IIRC was 8MHz (4 [or more] clock cycles) so
speed shouldn't be a large problem for software emulation at 300MHz. :-)
The video buffer should reside in that 32bit DDR2.. so it is sure
enough for Full HD display and decode in parallel, but it will not do
60p as VGA requires [60Hz refresh], just 1080i - interlaced [data rate
equals to 30Hz refresh]. It's a chip designed for digital still cameras,
so the playable bit-rate would not be too high.
Actually, it is a chip designed to do anything which means that it could
do video phone/conferencing too. TI lists one of the uses as DVR. Note
that at the current speed grade, the MPEG-4 decoder will do 1080p only
for movies at 24f/s. IIUC, TV would be as broadcast: 720P or 1080i --
one thing missing is deinterlace. I presume that they will be producing
faster chips that can do 1080p at faster frame rates although B-R disks
are usually movies which means 24f/s
--
James Tyrer
Linux (mostly) From Scratch
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