Hello,
This is Jasleen from Maxonic Milestone Management. We are a staffing
company based in SF Bay Area.
We currently have an immediate requirement for a Verification Engineer
 . This is a 6 Months Contract.

Responsibilities:
o Architect block and full-chip verification environments using HVLs
and constrained random techniques.
o Develop test plans and from specifications and write block and
chip-level tests.
o Run and debug RTL and Gate simulations and work with designers to
verify fixes.
Requirements:
o Experience verifying SOCs with embedded ARM CPUs, DSPs, peripherals
and interconnect protocols such as AHB, AXI, PCI Express etc.
o Strong HVL (SystemVerilog with VMM or UVM), C/C++, Perl, TCL
programming skills.
o SOC testing via C/C++/assembly programming of embedded processor.
o Good knowledge of EDA tools and excellent debug skills.
o Experience with Low Power verification techniques and verifying
mixed signal ICs a plus.
o Familiarity with assertion writing and formal verification is a plus.
Please send your resumes with subject 9051 to [email protected] or
call 408-739-4900 x 105

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