Hi All,
Can gatekeeper help review this fix?
_mm_slli_si128(v2, 1), the imm value 1 is sfhit byte count.
both gcc and open64 preprocess are
v3 = ((__m128i)__builtin_ia32_pslldqi128 (v2, (1) * 8));
// translate byte offset into bit offset.
gcc final code
pslldq $1, %xmm0 // back to byte offset
open64 final code
pslldq $8, %xmm0 // still bit offset.
Following is the fix for these intrinsic.
Index: osprey/be/cg/whirl2ops.cxx
===================================================================
--- osprey/be/cg/whirl2ops.cxx (revision 3320)
+++ osprey/be/cg/whirl2ops.cxx (working copy)
@@ -3784,6 +3784,24 @@
*kidno = 2;
return Gen_Literal_TN (WN_const_val (WN_kid0 (WN_kid2 (expr))), 4);
+
+ case INTRN_PSLLDQ:
+ case INTRN_PSRLDQ:
+#ifdef Is_True_On
+ {
+ const char * intrn_name = INTRN_c_name (id);
+ Is_True (WN_kid_count (expr) == 2,
+ ("Handle_Imm_Op: Invalid # of kids of %s intrn",
intrn_name));
+ Is_True (WN_operator (WN_kid0 (WN_kid1 (expr))) == OPR_INTCONST,
+ ("Handle_Imm_Op: Arg 2 of %s intrn must be immediate constant",
+ intrn_name));
+ Is_True (WN_const_val (WN_kid0 (WN_kid1 (expr))) %8 == 0,
+ ("offset is bit size must be byte baseed\n"));
+ }
+#endif
+ *kidno = 1;
+ return Gen_Literal_TN (WN_const_val (WN_kid0 (WN_kid1 (expr)))/8, 4);
+
case INTRN_PSLLWI:
case INTRN_PSLLDI:
case INTRN_PSLLQI:
@@ -3792,8 +3810,6 @@
case INTRN_PSRLQI:
case INTRN_PSRAWI:
case INTRN_PSRADI:
- case INTRN_PSLLDQ:
- case INTRN_PSRLDQ:
case INTRN_PSLLWI128:
case INTRN_PSLLDI128:
case INTRN_PSLLQI128:
------------------------------------------------------------------------------
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