Author: dcoakley Date: 2011-02-17 19:11:42 -0500 (Thu, 17 Feb 2011) New Revision: 3481
Modified: trunk/osprey/common/targ_info/generate/isa_subset_gen.cxx trunk/osprey/common/targ_info/generate/si_gen.cxx Log: Enable targ_info subsystem to work with ISA subsets. Previously this feature had not been used by any architecture. As a consequence of my changes to SI generation in trunk commit r3463, the generator became more strict in its handling of missing SI defintions. ISA subsets provide a useful way for targets to avoid the complaints without adding a lot of new dummy SI definitions. Note: changes to isa_subset_gen.cxx are contributed by Gang Yu. Approved by: Sun Chan Modified: trunk/osprey/common/targ_info/generate/isa_subset_gen.cxx =================================================================== --- trunk/osprey/common/targ_info/generate/isa_subset_gen.cxx 2011-02-17 18:49:09 UTC (rev 3480) +++ trunk/osprey/common/targ_info/generate/isa_subset_gen.cxx 2011-02-18 00:11:42 UTC (rev 3481) @@ -264,7 +264,17 @@ fprintf(cfile," { /* %s */\n", subset->name); for ( unsigned int i = 0; i < bit_vector_sizeof; ++i ) { - int members = subset->members[i]; + int members = 0; + for (int j = 0; j < 8; ++j ) { + TOP top = (TOP) ((i * 8) + j); + ISA_SUBSET ss; + for (ss = subset; ss != NULL ; ss = ss->superset) { + if (opcode_subset[top] == ss) { + members |= 1 << j; + break; + } + } + } fprintf(cfile," 0%03o, /* ",members); for (int j = 0; j < 8; ++j) { if (members & (1 << j)) { Modified: trunk/osprey/common/targ_info/generate/si_gen.cxx =================================================================== --- trunk/osprey/common/targ_info/generate/si_gen.cxx 2011-02-17 18:49:09 UTC (rev 3480) +++ trunk/osprey/common/targ_info/generate/si_gen.cxx 2011-02-18 00:11:42 UTC (rev 3481) @@ -89,8 +89,8 @@ const int max_results = ISA_OPERAND_max_results; const int max_machine_slots = 16; -static ISA_SUBSET machine_isa; static int current_machine_slot; +static ISA_SUBSET machine_isa[max_machine_slots]; static std::string machine_name[max_machine_slots]; static const char * const interface[] = { @@ -1172,7 +1172,7 @@ GNAME gname("latency"); output_latencies[*this] = gname; - fprintf(fd,"static const mUINT8 %s[%d] = {",gname.Gname(),times.size()); + fprintf(fd,"static const mUINT8 %s[%lu] = {",gname.Gname(),times.size()); bool is_first = true; std::vector<int>::iterator i; @@ -1696,7 +1696,7 @@ } i = 1; - fprintf(fd,"\nconst SI SI_all[%u] = {\n", instruction_group_set.size()); + fprintf(fd,"\nconst SI SI_all[%lu] = {\n", instruction_group_set.size()); for (mi = instruction_group_set.begin(); mi != instruction_group_set.end(); ++mi @@ -1714,7 +1714,7 @@ { std::list<INSTRUCTION_GROUP*>::iterator iig; - fprintf(fd,"\nstatic const int SI_ID_si_%d[%d] = {",machine_slot, + fprintf(fd,"\nstatic const int SI_ID_si_%d[%lu] = {",machine_slot, by_machine_instruction_groups[machine_slot].size()); bool is_first = true; @@ -1733,7 +1733,7 @@ void INSTRUCTION_GROUP::Output_Members(FILE* fd, int machine_slot) { - fprintf(fd," %-20u /* SI_ID_count */,\n", + fprintf(fd," %-20lu /* SI_ID_count */,\n", by_machine_instruction_groups[machine_slot].size()); fprintf(fd," SI_ID_si_%-11d /* SI_ID_si */,\n",machine_slot); } @@ -1780,6 +1780,9 @@ static std::vector<bool> top_sched_info_defined[max_machine_slots]; // Which elements defined + + static INSTRUCTION_GROUP* machine_dummies[max_machine_slots]; + // Pointer to dummy instruction used to fill unused slots }; std::vector<INSTRUCTION_GROUP*> @@ -1787,14 +1790,14 @@ std::vector<bool> TOP_SCHED_INFO_MAP::top_sched_info_defined[max_machine_slots]; +INSTRUCTION_GROUP* TOP_SCHED_INFO_MAP::machine_dummies[max_machine_slots]; + void TOP_SCHED_INFO_MAP::Create_Dummies( void ) { INSTRUCTION_GROUP *dummies = NULL; - TOP_SCHED_INFO_MAP::top_sched_info_ptr_map[current_machine_slot].resize( - TOP_count,NULL); - TOP_SCHED_INFO_MAP::top_sched_info_defined[current_machine_slot].resize( - TOP_count,false); + top_sched_info_ptr_map[current_machine_slot].resize(TOP_count,NULL); + top_sched_info_defined[current_machine_slot].resize(TOP_count,false); for ( int i = 0; i < TOP_count; ++i ) { if ( TOP_is_dummy((TOP)i) ) { @@ -1806,6 +1809,7 @@ top_sched_info_ptr_map[current_machine_slot][i] = dummies; } } + machine_dummies[current_machine_slot] = dummies; } void TOP_SCHED_INFO_MAP::Add_Entry( TOP top, INSTRUCTION_GROUP* ig ) @@ -1828,14 +1832,14 @@ bool err = false; bool is_first = true; for ( i = 0; i < TOP_count; ++i ) { - bool isa_member = ISA_SUBSET_Member(machine_isa, (TOP)i); + bool isa_member = ISA_SUBSET_Member(machine_isa[machine_slot], (TOP)i); bool is_dummy = TOP_is_dummy((TOP)i); if ( top_sched_info_defined[machine_slot][i] ) { if ( ! isa_member ) { fprintf(stderr, "### Warning: scheduling info for non-%s ISA opcode %s (%s)\n", - ISA_SUBSET_Name(machine_isa), + ISA_SUBSET_Name(machine_isa[machine_slot]), TOP_Name((TOP)i), machine_name[machine_slot].c_str()); } else if ( is_dummy ) { @@ -1858,8 +1862,13 @@ // If we have seen a fatal error, skip printing the entry to avoid a crash. if ( ! err ) { Maybe_Print_Comma(fd,is_first); - fprintf(fd,"\n %-4u /* %s */", - top_sched_info_ptr_map[machine_slot][i]->Id(),TOP_Name((TOP)i)); + if ( ! isa_member ) + fprintf(fd,"\n %-4u /* %s (dummy, not in ISA subset %s) */", + machine_dummies[machine_slot]->Id(),TOP_Name((TOP)i), + ISA_SUBSET_Name(machine_isa[machine_slot])); + else + fprintf(fd,"\n %-4u /* %s */", + top_sched_info_ptr_map[machine_slot][i]->Id(),TOP_Name((TOP)i)); } } fprintf(fd,"\n};\n"); @@ -1886,7 +1895,7 @@ void Machine( const char* name, ISA_SUBSET isa ) { machine_name[current_machine_slot] = name; - machine_isa = isa; + machine_isa[current_machine_slot] = isa; TOP_SCHED_INFO_MAP::Create_Dummies(); } ------------------------------------------------------------------------------ The ultimate all-in-one performance toolkit: Intel(R) Parallel Studio XE: Pinpoint memory and threading errors before they happen. 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