Hi Sun,
The CG_p2align is defined in cg_flags.cxx and only available on x86_64 and
loongson. I made the following patch to make it available for all target:
Index: cg_flags.cxx
===================================================================
--- cg_flags.cxx (revision 3628)
+++ cg_flags.cxx (working copy)
@@ -531,6 +531,8 @@
BOOL CG_compute_to = FALSE;
BOOL CG_valgrind_friendly = TRUE;
BOOL CG_Movext_ICMP = TRUE;
+#else
+INT32 CG_p2align = 0;
#endif
#ifdef TARG_LOONGSON
BOOL CGEXP_float_use_madd = FALSE;
Could you please review this patch? Thank you very much.
2011/5/25 Sun Chan <sun.c...@gmail.com>
> thx David. This is a lot better.
> Please check in.
> Sun
>
> On Wed, May 25, 2011 at 12:09 AM, David Coakley <dcoak...@gmail.com>
> wrote:
> > I would like to propose a different fix for the CG_p2align problem
> > that also fixes the build for the SL target (broken in r3614). With
> > this change, the change to cgemit.cxx should not be needed on IA-64.
> >
> > The change is to make the declaration of CG_p2align visible for all
> > targets. It is already being defined and set to 0 for non-x86
> > targets, so there is no need to add the ifdefs in cgemit.cxx.
> >
> > -David Coakley / AMD Open Source Compiler Engineering
> >
> > Index: osprey/be/cg/cg_flags.h
> > ===================================================================
> > --- osprey/be/cg/cg_flags.h (revision 3618)
> > +++ osprey/be/cg/cg_flags.h (working copy)
> > @@ -860,6 +860,7 @@
> > extern BOOL LOCS_Reduce_Prefetch;
> > extern BOOL LOCS_Reduce_Prefetch_set;
> > #endif
> > +extern INT32 CG_p2align;
> > #if defined(TARG_X8664) || defined(TARG_LOONGSON)
> > extern INT32 CG_sse_load_execute;
> > extern INT32 CG_load_execute;
> > @@ -868,7 +869,6 @@
> > extern BOOL CG_use_short_form;
> > extern BOOL CG_loadbw_execute;
> > extern BOOL CG_Movext_ICMP;
> > -extern INT32 CG_p2align;
> > extern BOOL CG_loop32;
> > extern BOOL CG_compute_to;
> > extern UINT64 CG_p2align_freq;
> >
> >
> >
> > On Tue, May 24, 2011 at 5:10 AM, Sun Chan <sun.c...@gmail.com> wrote:
> >> this makes no sense. That it is 16 byte aligned does not mean it
> >> should always be. Taking away an align pseudo does not make the
> >> program any more correct. And it certainly will be wrong if for some
> >> reason the code wants to be more than 16 byte aligned. Say, I want
> >> that to be cacheline aligned, and the cacheline is 32 bytes (again,
> >> this is hyperthetical)
> >> sun
> >>
> >> On Tue, May 24, 2011 at 6:56 PM, Jian-Xin Lai <laij...@gmail.com>
> wrote:
> >>> Since IA-64 instructions are already aligned to 16-byte boundary, I'm
> sure
> >>> the code alignment on IA-64 is not as important as x86.
> >>> Considering the similar code in other places in CG is only applied to
> >>> TARG_X8664 and TARG_LOONGSON, I think it's OK to disable the p2align on
> >>> IA-64.
> >>>
> >>> 2011/5/24 Sun Chan <sun.c...@gmail.com>
> >>>>
> >>>> if the alignment is 256, you still need it.
> >>>> Sun
> >>>>
> >>>> On Tue, May 24, 2011 at 5:12 PM, Wu Yongchong <wuyongch...@gmail.com>
> >>>> wrote:
> >>>> > EPIC is at least128bit aligned, no need for an "align" pseudo .
> >>>> >
> >>>> > On Tue, May 24, 2011 at 5:09 PM, Sun Chan <sun.c...@gmail.com>
> wrote:
> >>>> >> I don't understand why an "align" pseudo is not needed in IA64
> >>>> >> Sun
> >>>> >>
> >>>> >> On Tue, May 24, 2011 at 4:49 PM, Wu Yongchong <
> wuyongch...@gmail.com>
> >>>> >> wrote:
> >>>> >>> Here is the patch,
> >>>> >>> 1. the first one used #if defined to remove some code that
> specific in
> >>>> >>> X8664 and loogson, not in IA64.
> >>>> >>> 2. the second one , in IA64, _wn_to_val_num_map->Get_val((POINTER)
> >>>> >>> wn_cond) return a *void type, it must convert to a type INTPTR
> before
> >>>> >>> convert to IF_CMP_VAL(actually UINT32)
> >>>> >>>
> >>>> >>> Index: osprey/be/cg/cgemit.cxx
> >>>> >>>
> ===================================================================
> >>>> >>> --- osprey/be/cg/cgemit.cxx (revision 3624)
> >>>> >>> +++ osprey/be/cg/cgemit.cxx (working copy)
> >>>> >>> @@ -4864,8 +4864,10 @@
> >>>> >>> // alt-entry
> >>>> >>> if ( Assembly ) {
> >>>> >>> fprintf ( Asm_File, "\t%s\t%s\n", AS_AENT,
> >>>> >>> ST_name(entry_sym)); // KEY
> >>>> >>> +#if defined(TARG_X8664) || defined(TARG_LOONGSON)
> >>>> >>> if (CG_p2align != 0)
> >>>> >>> fputs ("\t.p2align 5,,\n",
> Asm_File);
> >>>> >>> +#endif
> >>>> >>> Print_Label (Asm_File, entry_sym, 0 );
> >>>> >>> }
> >>>> >>> EMT_Put_Elf_Symbol (entry_sym);
> >>>> >>> Index: osprey/be/opt/opt_proactive.cxx
> >>>> >>>
> ===================================================================
> >>>> >>> --- osprey/be/opt/opt_proactive.cxx (revision 3624)
> >>>> >>> +++ osprey/be/opt/opt_proactive.cxx (working copy)
> >>>> >>> @@ -10357,7 +10357,7 @@
> >>>> >>> UINT32 key;
> >>>> >>> STACK<WN *> * stk;
> >>>> >>>
> >>>> >>> - IF_CMP_VAL ret_val = (IF_CMP_VAL)
> >>>> >>> _wn_to_val_num_map->Get_val((POINTER) wn_cond);
> >>>> >>> + IF_CMP_VAL ret_val = (IF_CMP_VAL)(INTPTR)
> >>>> >>> _wn_to_val_num_map->Get_val((POINTER) wn_cond);
> >>>> >>> if (ret_val) {
> >>>> >>> *val = ((*val) << MAX_IF_CMP_BITS) + ret_val;
> >>>> >>> return;
> >>>> >>> @@ -10373,7 +10373,7 @@
> >>>> >>> for (int i = 0; i < stk->Elements(); i++) {
> >>>> >>> WN * wn_iter = stk->Top_nth(i);
> >>>> >>> if ((wn_cond == wn_iter) || (WN_Simp_Compare_Trees(wn_cond,
> >>>> >>> wn_iter) == 0)) {
> >>>> >>> - ret_val = (IF_CMP_VAL)
> _wn_to_val_num_map->Get_val((POINTER)
> >>>> >>> wn_iter);
> >>>> >>> + ret_val = (IF_CMP_VAL)(INTPTR)
> >>>> >>> _wn_to_val_num_map->Get_val((POINTER) wn_iter);
> >>>> >>> break;
> >>>> >>> }
> >>>> >>> }
> >>>> >>>
> >>>> >>>
> >>>> >>> --
> >>>> >>> yongchong
> >>>> >>>
> >>>> >>>
> >>>> >>>
> ------------------------------------------------------------------------------
> >>>> >>> vRanger cuts backup time in half-while increasing security.
> >>>> >>> With the market-leading solution for virtual backup and recovery,
> >>>> >>> you get blazing-fast, flexible, and affordable data protection.
> >>>> >>> Download your free trial now.
> >>>> >>> http://p.sf.net/sfu/quest-d2dcopy1
> >>>> >>> _______________________________________________
> >>>> >>> Open64-devel mailing list
> >>>> >>> Open64-devel@lists.sourceforge.net
> >>>> >>> https://lists.sourceforge.net/lists/listinfo/open64-devel
> >>>> >>>
> >>>> >>
> >>>> >
> >>>> >
> >>>> >
> >>>> > --
> >>>> > yongchong
> >>>> >
> >>>>
> >>>>
> >>>>
> ------------------------------------------------------------------------------
> >>>> vRanger cuts backup time in half-while increasing security.
> >>>> With the market-leading solution for virtual backup and recovery,
> >>>> you get blazing-fast, flexible, and affordable data protection.
> >>>> Download your free trial now.
> >>>> http://p.sf.net/sfu/quest-d2dcopy1
> >>>> _______________________________________________
> >>>> Open64-devel mailing list
> >>>> Open64-devel@lists.sourceforge.net
> >>>> https://lists.sourceforge.net/lists/listinfo/open64-devel
> >>>
> >>>
> >>>
> >>> --
> >>> Regards,
> >>> Lai Jian-Xin
> >>>
> >>
> >>
> ------------------------------------------------------------------------------
> >> vRanger cuts backup time in half-while increasing security.
> >> With the market-leading solution for virtual backup and recovery,
> >> you get blazing-fast, flexible, and affordable data protection.
> >> Download your free trial now.
> >> http://p.sf.net/sfu/quest-d2dcopy1
> >> _______________________________________________
> >> Open64-devel mailing list
> >> Open64-devel@lists.sourceforge.net
> >> https://lists.sourceforge.net/lists/listinfo/open64-devel
> >>
> >
>
--
Regards,
Lai Jian-Xin
------------------------------------------------------------------------------
vRanger cuts backup time in half-while increasing security.
With the market-leading solution for virtual backup and recovery,
you get blazing-fast, flexible, and affordable data protection.
Download your free trial now.
http://p.sf.net/sfu/quest-d2dcopy1
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