Hi Min,

Thanks for your help.  I'll clean up the duplicates that you point out.

Unless there is an objection from another gatekeeper, I will take your
review as approval to check in.

-David Coakley / AMD Open Source Compiler Engineering

On Wed, Jun 1, 2011 at 12:19 PM, Min Zhao <mzhao...@gmail.com> wrote:
> Hi,
>
> Although I'm  not a gatekeeper in CG, I looked at the patch.
>
> One minor comments: In barcelona_si.cxx, there is redundant definition:
> @@ -143,6 +149,10 @@
> TOP_or16,
> TOP_or32,
> TOP_or64,
> + TOP_ori8,
> + TOP_ori16,
> + TOP_ori8,
> + TOP_ori16,
>
> As you said, there are a lot of duplicate information among each
> microarch. It's better if we could have a way to specify common
> information. (I'm not asking here).
>
> Thanks,
>
> Min
>
> On Wed, May 25, 2011 at 5:30 PM, David Coakley <dcoak...@gmail.com> wrote:
>>
>> Could a gatekeeper review the attached patch to the targinfo
>> subsystem?  It is specific to the x8664 target.
>>
>> The patch adds information for the store-immediate and load-exec-store
>> forms of instructions.  Due to the way that things are currently
>> organized for x8664, we have to duplicate the information for each
>> microarch.
>>
>> Thanks,
>>
>> -David Coakley / AMD Open Source Compiler Engineering
>>
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