Author: mberg
Date: 2011-06-20 15:37:56 -0400 (Mon, 20 Jun 2011)
New Revision: 3656

Modified:
   trunk/osprey/be/cg/calls.cxx
   trunk/osprey/be/cg/cg_flags.cxx
   trunk/osprey/be/cg/cg_flags.h
   trunk/osprey/be/cg/cgdriver.cxx
   trunk/osprey/be/cg/x8664/expand.cxx
Log:
Addition of -CG:noavx_clear=<on|off>, which will be off by default,
allowing the x8664 targets with bdver1 enabled to generate covering
vzeroupper instructions to handle merge conflicts when changing mode
between SSE and AVX in ymm registers.  The flag allows users to disable
the emit of these instructions, which can have positive performance
under some scenarios.

CR by Jian-Xin.



Modified: trunk/osprey/be/cg/calls.cxx
===================================================================
--- trunk/osprey/be/cg/calls.cxx        2011-06-20 18:41:40 UTC (rev 3655)
+++ trunk/osprey/be/cg/calls.cxx        2011-06-20 19:37:56 UTC (rev 3656)
@@ -2069,6 +2069,9 @@
 
 void Generate_Entry_Merge_Clear(BOOL is_region)
 {
+  if (CG_NoClear_Avx_Simd) 
+    return;
+
   // If we have avx128 bit instructions, at the entry block, add a 
   // vzeroupper insn to clear the upper 128bits and
   // avoid merge dependencies on the machine.  Otherwise we would have

Modified: trunk/osprey/be/cg/cg_flags.cxx
===================================================================
--- trunk/osprey/be/cg/cg_flags.cxx     2011-06-20 18:41:40 UTC (rev 3655)
+++ trunk/osprey/be/cg/cg_flags.cxx     2011-06-20 19:37:56 UTC (rev 3656)
@@ -128,6 +128,7 @@
 BOOL CG_strcmp_expand = TRUE;
 BOOL CG_merge_counters_x86 = FALSE;
 BOOL CG_interior_ptrs_x86 = FALSE;
+BOOL CG_NoClear_Avx_Simd = FALSE;
 #endif
 BOOL CG_opt_level;
 BOOL CG_localize_tns = FALSE;

Modified: trunk/osprey/be/cg/cg_flags.h
===================================================================
--- trunk/osprey/be/cg/cg_flags.h       2011-06-20 18:41:40 UTC (rev 3655)
+++ trunk/osprey/be/cg/cg_flags.h       2011-06-20 19:37:56 UTC (rev 3656)
@@ -539,6 +539,7 @@
 extern BOOL CG_strcmp_expand;
 extern BOOL CG_merge_counters_x86;
 extern BOOL CG_interior_ptrs_x86;  // enable,disable interior pointer trans
+extern BOOL CG_NoClear_Avx_Simd;
 #endif
 extern INT CG_opt_level;
 extern BOOL CG_localize_tns;

Modified: trunk/osprey/be/cg/cgdriver.cxx
===================================================================
--- trunk/osprey/be/cg/cgdriver.cxx     2011-06-20 18:41:40 UTC (rev 3655)
+++ trunk/osprey/be/cg/cgdriver.cxx     2011-06-20 19:37:56 UTC (rev 3656)
@@ -484,6 +484,8 @@
     0, 0, 0,    &CG_merge_counters_x86, NULL },
   { OVK_BOOL,   OV_VISIBLE, TRUE, "interior_ptrs", "",
     0, 0, 0,    &CG_interior_ptrs_x86, NULL },
+  { OVK_BOOL,   OV_VISIBLE, TRUE, "noavx_clear", "",
+    0, 0, 0,    &CG_NoClear_Avx_Simd, NULL },
 #endif
   { OVK_BOOL,  OV_INTERNAL, TRUE, "skip_local_sched", "",
     0, 0, 0,   &CG_skip_local_sched, NULL },

Modified: trunk/osprey/be/cg/x8664/expand.cxx
===================================================================
--- trunk/osprey/be/cg/x8664/expand.cxx 2011-06-20 18:41:40 UTC (rev 3655)
+++ trunk/osprey/be/cg/x8664/expand.cxx 2011-06-20 19:37:56 UTC (rev 3656)
@@ -9924,8 +9924,11 @@
       Build_OP(TOP_andi64, rax_tn, rax_tn, Gen_Literal_TN(0xff,4), ops);
       INT64 num_xmms = TN_value(OP_opnd(op, 1));
       TN *r11_tn = Build_Dedicated_TN(ISA_REGISTER_CLASS_integer, R11, 8);
-      if (Is_Target_Orochi() && Is_Target_AVX()) {
-        Build_OP(TOP_vzeroupper, ops );
+      if ( Is_Target_Orochi() && Is_Target_AVX() ) {
+        // guard the addition of this insn by flag
+        if (CG_NoClear_Avx_Simd == false)
+          Build_OP(TOP_vzeroupper, ops );
+
         Build_OP(TOP_leaxx64, r11_tn, rax_tn, Gen_Literal_TN(8, 4), 
                 Gen_Literal_TN(4*(num_xmms-8), 4), ops);
       } else {


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