Hi all, Can gatekeeper help review fix for bug792: https://bugs.open64.net/show_bug.cgi?id=792 All the changes are proposed to support the constraint "b" used in inline asm on IA-64: http://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html#Machine-Constraints Intel IA-64—config/ia64/ia64.h b Branch register
The changes in osprey/be/cg/localize.cxx is to fix a bug in localization phase. When the BB has asm or is the successor of asm BB, don't localize the dedicated TN since they are used and defined by asm. The changes in osprey/be/cg/ia64/cgtarget.cxx is to support the constraint "b". The changes in osprey/be/cg/ia64/exp_loadstore.cxx is to support load/store to/from branch register. Since the ld/st only support integer register, we need an extra copy between branch register and integer for the ld/st. The changes in osprey/be/cg/whirl2ops.cxx is to get the right register number from the dedicated branch register. Thanks zhuqing
bug792.patch
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