The attached patch fixes a bug in DSP_SCH::Compute_Insn_Size(). Some operations have an opcode variant which assume that rax/eax is an operand/result. Thus when this register is being targeted no Mod R/M byte is needed, thus the instruction is 1 byte shorter.
Could a gatekeeper review this change when they have a chance? Thanks, Doug
cg_sched_modrm.patch
Description: cg_sched_modrm.patch
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