Author: dgilmore
Date: 2012-04-03 20:50:16 -0400 (Tue, 03 Apr 2012)
New Revision: 3900
Modified:
trunk/osprey/be/cg/x8664/cg_sched.cxx
Log:
This change fixes a bug in DSP_SCH::Compute_Insn_Size().
Some operations have an opcode variant which assume that rax/eax is an
operand/result. Thus when this register is being targeted no Mod R/M
byte is needed, thus the instruction is 1 byte shorter.
CR: Sun Chan
Modified: trunk/osprey/be/cg/x8664/cg_sched.cxx
===================================================================
--- trunk/osprey/be/cg/x8664/cg_sched.cxx 2012-04-04 00:48:58 UTC (rev
3899)
+++ trunk/osprey/be/cg/x8664/cg_sched.cxx 2012-04-04 00:50:16 UTC (rev
3900)
@@ -1963,7 +1963,33 @@
if( TN_is_register(opnd) ){
if( ( TN_register_class(opnd) == ISA_REGISTER_CLASS_integer ) ||
( TN_register_class(opnd) == ISA_REGISTER_CLASS_float ) ) {
- if( has_modrm == false ){
+ bool need_modrm = true;
+ // TOP_adci64 TOP_sbbi64 are not valid TOPs. Should they be?
+ if (TN_register(opnd) == RAX) {
+ switch(top) {
+ case TOP_adci32:
+ case TOP_addi32:
+ case TOP_addi64:
+ case TOP_andi32:
+ case TOP_andi64:
+ case TOP_cmpi32:
+ case TOP_cmpi64:
+ case TOP_ori32:
+ case TOP_ori64:
+ case TOP_sbbi32:
+ case TOP_subi32:
+ case TOP_subi64:
+ case TOP_testi32:
+ case TOP_testi64:
+ case TOP_xori32:
+ case TOP_xori64:
+ need_modrm = false;
+ break;
+ default:
+ ;
+ }
+ }
+ if( need_modrm && has_modrm == false ){
has_modrm = true;
insn_size++;
break;
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