of course you are right. OTOH, I am just referring to Gang's changes that
won't affect either. The reason x86 and ia64 has unalignment diff is due to
the arch for ia64 won't support unaligned access
Sun
On Sun, May 6, 2012 at 12:48 AM, Nelson H. F. Beebe <be...@math.utah.edu>wrote:
> Sun Chan <sun.c...@gmail.com> writes today:
>
> >> IA64 alignment rule is no diff from x86, as far as I know.
>
> No, x86 allows quite lax alignment (multiples of 2 or 4), but some
> models may work more efficiently if alignment is to multiples of 8.
>
> On IA-64, failure to align to a proper multiple produces a run-time
> fixup that degrades performance, and also produces syslog messages,
> like this:
>
> --------------------- Kernel Begin ------------------------
>
> WARNING: Unaligned Errors in these executables
> emacs-x : 3 Time(s)
>
> ---------------------- Kernel End -------------------------
>
> Recently, in the TeX Live 2012 build project, I found that an address
> of an int was passed to an X11 library routine that picked it up as an
> address of a long, producing run-time messages on IA-64 like this:
>
> xdvi-xaw(5977): unaligned access to 0x60000fffffc7eb14,
> ip=0x20000000003cf500
>
> We changed the type of the variable in the calling routine from int to
> long int, and that eliminated the run-time complaints.
>
> Here is a snippet from an IBM document ``Migrating C and C++
> Applications to AIX 5L on IA-64 Partners in Development September,
> 2000'':
>
> >> ...
> >> AIX on PowerPC
> AIX 5L on IA-64 on Itanium
> >> C and C++ 32-bit Source 64-bit Source
> ILP32 LP64
> >> Data Type Size/Alignment Size/Alignment
> Size/Alignment Size/Alignment
> >> char 1/1 1/1
> 1/1 1/1
> >> short 2/2 2/2
> 2/2 2/2
> >> int 4/4 4/4
> 4/4 4/4
> >> long 4/4 8/8
> 4/4 8/8
> >> longlong 8/8 8/8
> 8/8 8/8
> >> pointer 4/4 8/8
> 4/4 8/8
> >> float 4/4 4/4
> 4/4 4/4
> >> double 8/4 8/4
> 8/8 8/8
> >> longdouble 16/16 16/16
> 16/16 16/16
> >>
> >> *Note that long long has a size of 8 bytes and is aligned on 8 byte
> boundaries in both 32-bit and 64-bit modes.
> >> Also note that integrals and floats are aligned according on their
> natural boundary (same as their size) which is
> >> different than the rules for IA-32. Applications requiring the IA-32
> alignment rules can use the
> >> "#pragma align=ia64unix386". However the size of long double will
> remain 16 bytes even when the pragma is
> >> used.
> >> ...
>
> Here is another snippet from the ``Intel IA-64 Architecture Software
> Developer's Manual, Volume 1: IA-64 Application Architecture, January
> 2000, Order Number: 245317-001'':
>
> >> ...
> >> 3.2.2 Addressable Units and Alignment
> >>
> >> Memory can be addressed in units of 1, 2, 4, 8, 10 and 16 bytes. It is
> >> recommended that all addressable units be stored on their naturally
> >> aligned boundaries. Hardware and/or operating system software may have
> >> support for unaligned accesses, possibly with some performance
> >> cost. 10-byte floating-point values should be stored on 16-byte
> >> aligned boundaries. Bits within larger units are always numbered from
> >> 0 starting with the least-significant bit. Quantities loaded from
> >> memory to general registers are always placed in the least-significant
> >> portion of the register (loaded values are placed right justified in
> >> the target general register). Instruction bundles (3 IA-64
> >> instructions per bundle) are 16-byte units that are always aligned on
> >> 16-byte boundaries.
> >> ...
>
>
> -------------------------------------------------------------------------------
> - Nelson H. F. Beebe Tel: +1 801 581 5254
> -
> - University of Utah FAX: +1 801 581 4148
> -
> - Department of Mathematics, 110 LCB Internet e-mail:
> be...@math.utah.edu -
> - 155 S 1400 E RM 233 be...@acm.org
> be...@computer.org -
> - Salt Lake City, UT 84112-0090, USA URL:
> http://www.math.utah.edu/~beebe/ -
>
> -------------------------------------------------------------------------------
>
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