On Sat, Apr 29, 2017 at 5:22 AM, Holger Freyther <[email protected]> wrote: > @dexter/@tom: Do you see any cpu feature that should be there but isn't?
SSE3 and SSE4_1 are the instruction sets used by osmo-trx. There should be no instruction set concerns for a processor that supports AVX, so I'm not sure what's going on here. -TT
