configure.ac | 2 -
src/via_display.c | 89 ++++++++++++++++++++++++++++++++++++++++++------------
2 files changed, 71 insertions(+), 20 deletions(-)
New commits:
commit 03907c23746cbaf418d4364150af4d9375bfd9a8
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Thu Jun 2 05:24:26 2016 -0700
Version bumped to 0.4.160
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/configure.ac b/configure.ac
index 2162c77..6f08897 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
# Initialize Autoconf
AC_PREREQ(2.57)
AC_INIT([xf86-video-openchrome],
- [0.4.159],
+ [0.4.160],
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg&component=Driver/openchrome],
[xf86-video-openchrome])
commit 35f964d62f3257ec8d9ba9029865c47fa2af718e
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Thu Jun 2 05:16:34 2016 -0700
Updating the code that initializes various IGA1 characteristics
viaIGA1SetDisplayRegister function contains the code in question.
This function is located inside via_display.c.
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/src/via_display.c b/src/via_display.c
index 810d2fa..653ea7b 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -677,9 +677,70 @@ viaIGA1SetDisplayRegister(ScrnInfoPtr pScrn,
DisplayModePtr mode)
break;
}
- /* Linear Mode */
+
+ /* 3X5.32[7:5] - HSYNC Delay Number by VCLK
+ * 000: No delay
+ * 001: Delay + 4 VCKs
+ * 010: Delay + 8 VCKs
+ * 011: Delay + 12 VCKs
+ * 100: Delay + 16 VCKs
+ * 101: Delay + 20 VCKs
+ * Others: Undefined
+ * 3X5.32[4] - Reserved
+ * 3X5.32[3] - CRT SYNC Driving Selection
+ * 0: Low
+ * 1: High
+ * 3X5.32[2] - Display End Blanking Enable
+ * 0: Disable
+ * 1: Enable
+ * 3X5.32[1] - Digital Video Port (DVP) Gamma Correction
+ * If the gamma correction of primary display is
+ * turned on, the gamma correction in DVP can be
+ * enabled / disabled by this bit.
+ * 0: Disable
+ * 1: Enable
+ * 3X5.32[0] - Real-Time Flipping
+ * 0: Flip by the frame
+ * 1: Flip by each scan line */
+ ViaCrtcMask(hwp, 0x32, 0x00, 0xED);
+
+ /*
+ * 3X5.33[7] - Primary Display Gamma Correction
+ * 0: Disable
+ * 1: Enable
+ * 3X5.33[6] - Primary Display Interlace Mode
+ * 0: Disable
+ * 1: Enable
+ * 3X5.33[5] - Horizontal Blanking End Bit [6]
+ * 3X5.33[4] - Horizontal Synchronization Start Bit [8]
+ * 3X5.33[3] - Prefetch Mode
+ * 0: Disable
+ * 1: Enable
+ * 3X5.33[2:0] - The Value will Shift the HSYNC to be Early than Planned
+ * 000: Shift to early time by 3 characters
+ * (VGA mode suggested value; default value)
+ * 001: Shift to early time by 4 characters
+ * 010: Shift to early time by 5 characters
+ * 011: Shift to early time by 6 characters
+ * 100: Shift to early time by 7 characters
+ * 101: Shift to early time by 0 character
+ * (Non-VGA mode suggested value)
+ * 110: Shift to early time by 1 character
+ * 111: Shift to early time by 2 characters */
+ ViaCrtcMask(hwp, 0x33, 0x00, 0x48);
+
+ /* Set IGA1 to linear mode */
+ /* 3X5.43[2] - IGA1 Address Mode Selection
+ * 0: Linear
+ * 1: Tile */
ViaCrtcMask(hwp, 0x43, 0x00, 0x04);
+ /* Disable IGA1 gamma correction. */
+ ViaCrtcMask(hwp, 0x33, 0x00, 0x80);
+
+ /* Disable DVP gamma correction */
+ ViaCrtcMask(hwp, 0x32, 0x00, 0x02);
+
/* Set IGA1 horizontal total.*/
/* Due to IGA1 horizontal total being only 9 bits wide,
@@ -922,21 +983,6 @@ viaIGA1SetDisplayRegister(ScrnInfoPtr pScrn,
DisplayModePtr mode)
ViaCrtcMask(hwp, 0x09, 0x00, 0x1F);
hwp->writeCrtc(hwp, 0x14, 0x00);
- switch (pVia->Chipset) {
- case VIA_CX700:
- case VIA_K8M890:
- case VIA_P4M900:
- case VIA_VX800:
- case VIA_VX855:
- case VIA_VX900:
- break;
- default:
- /* some leftovers */
- ViaCrtcMask(hwp, 0x32, 0, 0xFF);
- ViaCrtcMask(hwp, 0x33, 0, 0xC8);
- break;
- }
-
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Exiting viaIGA1SetDisplayRegister.\n"));
}
commit fedc9f12574180d7feb99a6f188296b954bb7360
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Thu Jun 2 04:49:34 2016 -0700
Tweak of the portion that sets IGA1 horizontal display fetch count
viaIGA1SetDisplayRegister function contains the code in question.
This function is located inside via_display.c.
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/src/via_display.c b/src/via_display.c
index 3f6cac7..810d2fa 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -889,7 +889,7 @@ viaIGA1SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr
mode)
ViaCrtcMask(hwp, 0x35, temp >> 3, 0xE0);
- /* Set IGA1 alignment. */
+ /* Set IGA1 horizontal display fetch (read) count. */
temp = (mode->CrtcHDisplay * (pScrn->bitsPerPixel >> 3)) >> 3;
/* Make sure that this is 32-byte aligned. */
@@ -898,13 +898,18 @@ viaIGA1SetDisplayRegister(ScrnInfoPtr pScrn,
DisplayModePtr mode)
temp &= ~0x03;
}
+ /* Primary Display Horizontal Display Fetch Count Data needs to be
+ * 16-byte aligned. */
+ temp = temp >> 1;
+
/* 3C5.1C[7:0] - Primary Display Horizontal Display
* Fetch Count Data Bits [7:0] */
- hwp->writeSeq(hwp, 0x1C, (temp >> 1) & 0xFF);
+ hwp->writeSeq(hwp, 0x1C, temp & 0xFF);
/* 3C5.1D[1:0] - Primary Display Horizontal Display
* Fetch Count Data Bits [9:8] */
- ViaSeqMask(hwp, 0x1D, temp >> 9, 0x03);
+ ViaSeqMask(hwp, 0x1D, temp >> 8, 0x03);
+
/* line compare: We are not doing splitscreen so 0x3FFF */
hwp->writeCrtc(hwp, 0x18, 0xFF);
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