On Thu, 7 Nov 2019 at 09:34, Adrian Bunk <[email protected]> wrote: > > On Wed, Nov 06, 2019 at 10:18:18AM -0800, Alistair Francis wrote: > >... > > +TUNE_CCARGS_riscv64 .= "${@bb.utils.contains('TUNE_FEATURES', 'riscv64-f', > > ' -mabi=lp64d', ' -mabi=lp64', d)}" > > +TUNE_CCARGS_riscv32 .= "${@bb.utils.contains('TUNE_FEATURES', 'riscv32-f', > > ' -mabi=ilp32f', ' -mabi=ilp32', d)}" > >... > > That looks wrong, what would you put in TUNE_FEATURES > for -mabi=lp64f when -mabi=lp64d is called riscv64-f? > > Also note that this is only the floating point calling convention, > whether the compiler emits floating point instructions is defined > by -march. > > It would be good if this would start with a plan how to handle > all possible combination of RISC-V ISA extensions, ideally better > than the arm mess.
I am keen to see this as well, since I am currently directly hardcoding -march/-mabi in the machine conf. It would be nice to see the ISA tunes available in oe-core, even if that is just the tune features and not predefined tunes (e.g. like microblaze). Regards, Nathan > > cu > Adrian > > -- > > "Is there not promise of rain?" Ling Tan asked suddenly out > of the darkness. There had been need of rain for many days. > "Only a promise," Lao Er said. > Pearl S. Buck - Dragon Seed > > -- > _______________________________________________ > Openembedded-core mailing list > [email protected] > http://lists.openembedded.org/mailman/listinfo/openembedded-core -- _______________________________________________ Openembedded-core mailing list [email protected] http://lists.openembedded.org/mailman/listinfo/openembedded-core
