On Sat, Mar 12, 2016 at 2:04 PM, Bruce Ashfield <[email protected]> wrote:
> > > On Sat, Mar 12, 2016 at 9:43 AM, Richard Purdie < > [email protected]> wrote: > >> On Fri, 2016-03-11 at 13:44 -0500, Bruce Ashfield wrote: >> > Importing a series of mainline backports to support USB on a couple >> > of >> > Intel platforms: >> > >> > bbce8fe2cc42 usb: dwc3: pci: add support for Intel Broxton SOC >> > e734e1d9f827 usb: dwc3: pci: Set enblslpm quirk for Synopsys >> > platforms >> > 1c6bb6694d50 usb: dwc3: Add dis_enblslpm_quirk >> > 1c6be99e56b8 usb: dwc3: pci: trivial: Formatting >> > 2f2b89764b97 usb: dwc3: pci: passing forward the ACPI companion >> > ea4b3c72d976 usb: dwc3: core: convert to unified device property >> > interface >> > dc670b52c69a usb: common: of_usb_get_dr_mode to usb_get_dr_mode >> > 586fc5174649 usb: dwc3: st: prepare the driver for generic >> > usb_get_dr_mode function >> > 0624bd9af7ef usb: common: of_usb_get_maximum_speed to >> > usb_get_maximum_speed >> > e65bc5467e07 usb: dwc3: Add frame length adjustment quirk >> > a90954c5d267 usb: musb: dsps: control musb speed based on dts >> > setting >> > b48ff160a993 usb: renesas_usbhs: Allow an OTG PHY driver to >> > provide VBUS >> > d1c59752195e usb: chipidea: set usb otg capabilities >> > 733eada2cdec usb: common: add API to update usb otg capabilities >> > by device tree >> > 7ab2108dd82b usb: dwc3: core: avoid NULL pointer dereference >> > 1aedb48b7dc9 usb: dwc3: add ULPI interface support >> > 07e42a29fb7e usb: dwc3: pci: add quirk for Baytrails >> > 065917252622 usb: dwc3: add hsphy_interface property >> > b2bb32a363a3 usb: dwc3: setup phys earlier >> > bf6bb0a6ebb5 usb: dwc3: soft reset to it's own function >> > d481da949476 usb: dwc3: cache hwparams earlier >> > 9ac66262a201 usb: dwc3: store driver data earlier >> > 5f940588938c usb: dwc3: ULPI or UTMI+ select >> > 04fdce097f83 usb: dwc3: USB2 PHY register access bits >> > b7209213cc05 usb: add bus type for USB ULPI >> >> I have a suspicion this breaks qemuppc: >> >> >> https://autobuilder.yoctoproject.org/main/builders/nightly-ppc-lsb/builds/683/steps/BuildImages/logs/stdio > > > Yup. With mainline backports, I have a shorter validation cycle, since > they really should > be safe. > > I'll hunt up whatever is missing from the series and send another update. > I found the missing commit: 6a88bbe8e30d4beb2320b5a7452242a1fe7889c5 I added it to the patch, and just sent v2. qemuppc builds fine here with this set of SRCREVs Bruce > > Bruce > > >> >> >> Cheers, >> >> Richard >> -- >> _______________________________________________ >> Openembedded-core mailing list >> [email protected] >> http://lists.openembedded.org/mailman/listinfo/openembedded-core >> > > > > -- > "Thou shalt not follow the NULL pointer, for chaos and madness await thee > at its end" > -- "Thou shalt not follow the NULL pointer, for chaos and madness await thee at its end"
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