From: Ross Burton <[email protected]>

The JIT uses the ISB instruction, but being a multi-core barrier
instruction this doesn't exist on the single-core ARMv5 ISA. Check the
ISA level before using ISB.

Also set [cleandirs] for ${B} to ensure clean builds are done when
reconfiguring.

[ YOCTO #14572 ]

Signed-off-by: Ross Burton <[email protected]>
---
 .../mozjs/mozjs-115/armv5.patch               | 19 +++++++++++++++++++
 .../mozjs/mozjs-115_115.2.0.bb                |  2 ++
 2 files changed, 21 insertions(+)
 create mode 100644 meta-oe/recipes-extended/mozjs/mozjs-115/armv5.patch

diff --git a/meta-oe/recipes-extended/mozjs/mozjs-115/armv5.patch 
b/meta-oe/recipes-extended/mozjs/mozjs-115/armv5.patch
new file mode 100644
index 0000000000..4c45955bca
--- /dev/null
+++ b/meta-oe/recipes-extended/mozjs/mozjs-115/armv5.patch
@@ -0,0 +1,19 @@
+The ISB instruction isn't available in ARMv5 or v6, so
+guard it's use to fix the build on qemuarmv5.
+
+Upstream-Status: Pending
+Signed-off-by: Ross Burton <[email protected]>
+
+diff --git a/js/src/jit/arm/Architecture-arm.cpp 
b/js/src/jit/arm/Architecture-arm.cpp
+--- a/js/src/jit/arm/Architecture-arm.cpp      2024-01-18 17:31:32.078718197 
+0000
++++ b/js/src/jit/arm/Architecture-arm.cpp      2024-01-18 18:00:16.738921445 
+0000
+@@ -529,7 +529,9 @@
+ void FlushExecutionContext() {
+ #ifndef JS_SIMULATOR_ARM
++#if __ARM_ARCH >= 7
+   // Ensure that any instructions already in the pipeline are discarded and
+   // reloaded from the icache.
+   asm volatile("isb\n" : : : "memory");
++#endif
+ #else
+   // We assume the icache flushing routines on other platforms take care of 
this
diff --git a/meta-oe/recipes-extended/mozjs/mozjs-115_115.2.0.bb 
b/meta-oe/recipes-extended/mozjs/mozjs-115_115.2.0.bb
index e1a547c339..84db3cd3c2 100644
--- a/meta-oe/recipes-extended/mozjs/mozjs-115_115.2.0.bb
+++ b/meta-oe/recipes-extended/mozjs/mozjs-115_115.2.0.bb
@@ -16,6 +16,7 @@ SRC_URI = 
"https://archive.mozilla.org/pub/firefox/releases/${PV}esr/source/fire
            file://musl-disable-stackwalk.patch \
            file://0001-add-arm-to-list-of-mozinline.patch \
            file://py3.12.patch \
+           file://armv5.patch \
            "
 SRC_URI[sha256sum] = 
"51534dd2a158d955a2cb67cc1308f100f6c9def0788713ed8b4d743f3ad72457"
 
@@ -75,6 +76,7 @@ do_configure() {
         ${JIT} \
         ${ICU}
 }
+do_configure[cleandirs] += "${B}"
 
 do_install() {
     oe_runmake 'DESTDIR=${D}' install
-- 
2.34.1

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